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Commit 037967bc authored by Vishalsingh Hajeri's avatar Vishalsingh Hajeri Committed by Gerrit - the friendly Code Review server
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msm: camera: ife: Dump ife camnoc debug registers 



ife camnoc debug registers need to dumped only
when bus overflow status is set.

CRs-Fixed: 2538876
Change-Id: I6f886f6e084380de62c0b4acaa48fa02fce01136
Signed-off-by: default avatarVishalsingh Hajeri <vhajeri@codeaurora.org>
parent 3205f18e

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.c

+65 −61
Original line number Diff line number Diff line
@@ -762,28 +762,14 @@ static int cam_vfe_camif_lite_process_cmd( 
	return rc;

}



static void cam_vfe_camif_lite_overflow_debug_info(uint32_t *status,

static void cam_vfe_camif_lite_overflow_debug_info(

	struct cam_vfe_mux_camif_lite_data *camif_lite_priv)

{

	uint32_t bus_overflow_status = 0;

	struct cam_vfe_soc_private *soc_private = NULL;

	uint32_t val0, val1, val2, val3;



	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];

	soc_private = camif_lite_priv->soc_info->soc_private;



	if (bus_overflow_status) {

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);

		CAM_INFO(CAM_ISP,

			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",

			val0, val1, val2);



	} else {

	val0 = cam_io_r(camif_lite_priv->mem_base +

		camif_lite_priv->common_reg->top_debug_0);

	val1 = cam_io_r(camif_lite_priv->mem_base +
@@ -828,7 +814,6 @@ static void cam_vfe_camif_lite_overflow_debug_info(uint32_t *status, 
	CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",

		val0, val1);

}

}



static void cam_vfe_camif_lite_print_status(uint32_t *status,

	int err_type, struct cam_vfe_mux_camif_lite_data *camif_lite_priv)
@@ -836,6 +821,7 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status, 
	uint32_t violation_mask = 0x3F00, violation_status = 0;

	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;

	struct cam_vfe_soc_private *soc_private = NULL;

	uint32_t val0, val1, val2;



	if (!status) {

		CAM_ERR(CAM_ISP, "Invalid params");
@@ -893,13 +879,21 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status, 
		if (bus_overflow_status & 0x02000000)

			CAM_INFO(CAM_ISP, "RDI2 BUS OVERFLOW");



		return;

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);

		CAM_INFO(CAM_ISP,

			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",

			val0, val1, val2);

	}



	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {

		CAM_INFO(CAM_ISP, "PDLIB / LCR Module hang");

		/* print debug registers */

		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);

		cam_vfe_camif_lite_overflow_debug_info(camif_lite_priv);

		return;

	}
@@ -979,12 +973,22 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status, 


		if (bus_overflow_status & 0x08)

			CAM_INFO(CAM_ISP, "RDI3 BUS OVERFLOW");



		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);

		CAM_INFO(CAM_ISP,

			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",

			val0, val1, val2);

	}



	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {

		CAM_INFO(CAM_ISP, "RDI hang");

		/* print debug registers */

		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);

		cam_vfe_camif_lite_overflow_debug_info(camif_lite_priv);

		return;

	}

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver3.c

+56 −62
Original line number Diff line number Diff line
@@ -776,27 +776,11 @@ static int cam_vfe_camif_ver3_process_cmd( 
}





static void cam_vfe_camif_ver3_overflow_debug_info(uint32_t *status,

static void cam_vfe_camif_ver3_overflow_debug_info(

	struct cam_vfe_mux_camif_ver3_data *camif_priv)

{

	struct cam_vfe_soc_private *soc_private;

	uint32_t bus_overflow_status;

	uint32_t val0, val1, val2, val3;



	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];

	soc_private = camif_priv->soc_info->soc_private;



	if (bus_overflow_status) {

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);

		CAM_INFO(CAM_ISP,

			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",

			val0, val1, val2);

	} else {

	val0 = cam_io_r(camif_priv->mem_base +

		camif_priv->common_reg->top_debug_0);

	val1 = cam_io_r(camif_priv->mem_base +
@@ -841,13 +825,13 @@ static void cam_vfe_camif_ver3_overflow_debug_info(uint32_t *status, 
		val0, val1);

}



}



static void cam_vfe_camif_ver3_print_status(uint32_t *status,

	int err_type, struct cam_vfe_mux_camif_ver3_data *camif_priv)

{

	uint32_t violation_mask = 0x3F, module_id = 0;

	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;

	struct cam_vfe_soc_private *soc_private;

	uint32_t val0, val1, val2;



	if (!status) {

		CAM_ERR(CAM_ISP, "Invalid params");
@@ -933,13 +917,23 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status, 
		if (bus_overflow_status & 0x0200000)

			CAM_INFO(CAM_ISP, "PDAF BUS OVERFLOW");



		soc_private = camif_priv->soc_info->soc_private;

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);

		cam_cpas_reg_read(soc_private->cpas_handle,

			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);

		CAM_INFO(CAM_ISP,

			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",

			val0, val1, val2);

		return;

	}



	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {

		CAM_INFO(CAM_ISP, "PIXEL PIPE Module hang");

		/* print debug registers */

		cam_vfe_camif_ver3_overflow_debug_info(status, camif_priv);

		cam_vfe_camif_ver3_overflow_debug_info(camif_priv);

		return;

	}