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Commit 036db8bd authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata 

Pull libata fixes from Tejun Heo:
 "An earlier commit to add reset control for embedded ahci controllers
  affected some of the hardware specific drivers and got reverted for
  now.

  Other than that, just per-device workarounds and trivial changes"

* 'for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  driver core: add __printf verification to __ata_ehi_pushv_desc
  ata: fix spelling mistake: "directon" -> "direction"
  libata: Apply NOLPM quirk for SanDisk SD7UB3Q*G1001 SSDs
  libata: Apply NOLPM quirk for SAMSUNG MZMPC128HBFU-000MV SSD
  ata: ahci: mvebu: override ahci_stop_engine for mvebu AHCI
  libahci: Allow drivers to override stop_engine
  Revert "ata: ahci-platform: add reset control support"
parents 93a0d340 0d74d872

Documentation/devicetree/bindings/ata/ahci-platform.txt

+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ compatible: 
Optional properties:

- dma-coherent      : Present if dma operations are coherent

- clocks            : a list of phandle + clock specifier pairs

- resets            : a list of phandle + reset specifier pairs

- target-supply     : regulator for SATA target power

- phys              : reference to the SATA PHY node

- phy-names         : must be "sata-phy"

drivers/ata/ahci.c

+3 −3
Original line number Diff line number Diff line
@@ -698,7 +698,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, 


	DPRINTK("ENTER\n");



	ahci_stop_engine(ap);

	hpriv->stop_engine(ap);



	rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),

				 deadline, &online, NULL);
@@ -724,7 +724,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, 
	bool online;

	int rc;



	ahci_stop_engine(ap);

	hpriv->stop_engine(ap);



	/* clear D2H reception area to properly wait for D2H FIS */

	ata_tf_init(link->device, &tf);
@@ -788,7 +788,7 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class, 


	DPRINTK("ENTER\n");



	ahci_stop_engine(ap);

	hpriv->stop_engine(ap);



	for (i = 0; i < 2; i++) {

		u16 val;

drivers/ata/ahci.h

+7 −1
Original line number Diff line number Diff line
@@ -350,7 +350,6 @@ struct ahci_host_priv { 
	u32			em_msg_type;	/* EM message type */

	bool			got_runtime_pm; /* Did we do pm_runtime_get? */

	struct clk		*clks[AHCI_MAX_CLKS]; /* Optional */

	struct reset_control	*rsts;		/* Optional */

	struct regulator	**target_pwrs;	/* Optional */

	/*

	 * If platform uses PHYs. There is a 1:1 relation between the port number and
@@ -366,6 +365,13 @@ struct ahci_host_priv { 
	 * be overridden anytime before the host is activated.

	 */

	void			(*start_engine)(struct ata_port *ap);

	/*

	 * Optional ahci_stop_engine override, if not set this gets set to the

	 * default ahci_stop_engine during ahci_save_initial_config, this can

	 * be overridden anytime before the host is activated.

	 */

	int			(*stop_engine)(struct ata_port *ap);



	irqreturn_t 		(*irq_handler)(int irq, void *dev_instance);



	/* only required for per-port MSI(-X) support */

drivers/ata/ahci_mvebu.c

+56 −0
Original line number Diff line number Diff line
@@ -62,6 +62,60 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv) 
	writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);

}



/**

 * ahci_mvebu_stop_engine

 *

 * @ap:	Target ata port

 *

 * Errata Ref#226 - SATA Disk HOT swap issue when connected through

 * Port Multiplier in FIS-based Switching mode.

 *

 * To avoid the issue, according to design, the bits[11:8, 0] of

 * register PxFBS are cleared when Port Command and Status (0x18) bit[0]

 * changes its value from 1 to 0, i.e. falling edge of Port

 * Command and Status bit[0] sends PULSE that resets PxFBS

 * bits[11:8; 0].

 *

 * This function is used to override function of "ahci_stop_engine"

 * from libahci.c by adding the mvebu work around(WA) to save PxFBS

 * value before the PxCMD ST write of 0, then restore PxFBS value.

 *

 * Return: 0 on success; Error code otherwise.

 */

int ahci_mvebu_stop_engine(struct ata_port *ap)

{

	void __iomem *port_mmio = ahci_port_base(ap);

	u32 tmp, port_fbs;



	tmp = readl(port_mmio + PORT_CMD);



	/* check if the HBA is idle */

	if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)

		return 0;



	/* save the port PxFBS register for later restore */

	port_fbs = readl(port_mmio + PORT_FBS);



	/* setting HBA to idle */

	tmp &= ~PORT_CMD_START;

	writel(tmp, port_mmio + PORT_CMD);



	/*

	 * bit #15 PxCMD signal doesn't clear PxFBS,

	 * restore the PxFBS register right after clearing the PxCMD ST,

	 * no need to wait for the PxCMD bit #15.

	 */

	writel(port_fbs, port_mmio + PORT_FBS);



	/* wait for engine to stop. This could be as long as 500 msec */

	tmp = ata_wait_register(ap, port_mmio + PORT_CMD,

				PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);

	if (tmp & PORT_CMD_LIST_ON)

		return -EIO;



	return 0;

}



#ifdef CONFIG_PM_SLEEP

static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)

{
@@ -112,6 +166,8 @@ static int ahci_mvebu_probe(struct platform_device *pdev) 
	if (rc)

		return rc;



	hpriv->stop_engine = ahci_mvebu_stop_engine;



	if (of_device_is_compatible(pdev->dev.of_node,

				    "marvell,armada-380-ahci")) {

		dram = mv_mbus_dram_info();

drivers/ata/ahci_qoriq.c

+1 −1
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class, 


	DPRINTK("ENTER\n");



	ahci_stop_engine(ap);

	hpriv->stop_engine(ap);



	/*

	 * There is a errata on ls1021a Rev1.0 and Rev2.0 which is: