Commit 028a00f5 authored Jul 28, 2021 by Taniya Das

clk: qcom: gpucc: Update the post div ops for GPUCC PLL for KHAJE



The post div for GPU_CC Zonda PLL is fixed and thus move to use the ro
ops for the same.

Change-Id: I4c549d8b5ba69a2083ae02cadebb139f033d316e
Signed-off-by: Taniya Das <tdas@codeaurora.org>

parent cf75a863

drivers/clk/qcom/gpucc-khaje.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -130,7 +130,7 @@ static struct clk_alpha_pll_postdiv gpu_cc_pll0_out_main = {
		.parent_names = (const char *[]){ "gpu_cc_pll0" },
		.num_parents = 1,
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_alpha_pll_postdiv_zonda_ops,
		.ops = &clk_alpha_pll_postdiv_ro_ops,
		},
		};