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Commit 0274a9c5 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx9: fix typo in mpd init 



Using the wrong macro for soc15 register access.

Reviewed-by: default avatarmonk liu <monk.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 42ce2243

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −2
Original line number Diff line number Diff line
@@ -1989,12 +1989,12 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring) 


	/* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */

	ring->wptr = 0;

	mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);

	mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR);



	/* set the vmid for the queue */

	mqd->cp_hqd_vmid = 0;



	tmp = RREG32(mmCP_HQD_PERSISTENT_STATE);

	tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PERSISTENT_STATE, PRELOAD_SIZE, 0x53);

	mqd->cp_hqd_persistent_state = tmp;