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Commit 026e2c05 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86, cyrix: debug 



Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 93ded9b8

arch/x86/kernel/cpu/cyrix.c

+10 −10
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ static void __cpuinit set_cx86_reorder(void) 
	setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */



	/* Load/Store Serialize to mem access disable (=reorder it) */

	setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);

	setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);

	/* set load/store serialize from 1GB to 4GB */

	ccr3 |= 0xe0;

	setCx86(CX86_CCR3, ccr3);
@@ -127,11 +127,11 @@ static void __cpuinit set_cx86_memwb(void) 
	printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n");



	/* CCR2 bit 2: unlock NW bit */

	setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);

	setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04);

	/* set 'Not Write-through' */

	write_cr0(read_cr0() | X86_CR0_NW);

	/* CCR2 bit 2: lock NW bit and set WT1 */

	setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);

	setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14);

}



static void __cpuinit set_cx86_inc(void)
@@ -144,10 +144,10 @@ static void __cpuinit set_cx86_inc(void) 
	setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */

	/* PCR1 -- Performance Control */

	/* Incrementor on, whatever that is */

	setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02);

	setCx86_old(CX86_PCR1, getCx86_old(CX86_PCR1) | 0x02);

	/* PCR0 -- Performance Control */

	/* Incrementor Margin 10 */

	setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04);

	setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) | 0x04);

	setCx86(CX86_CCR3, ccr3);	/* disable MAPEN */

}
@@ -162,14 +162,14 @@ static void __cpuinit geode_configure(void) 
	local_irq_save(flags);



	/* Suspend on halt power saving and enable #SUSP pin */

	setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);

	setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88);



	ccr3 = getCx86(CX86_CCR3);

	setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);	/* enable MAPEN */





	/* FPU fast, DTE cache, Mem bypass */

	setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38);

	setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38);

	setCx86(CX86_CCR3, ccr3);			/* disable MAPEN */



	set_cx86_memwb();
@@ -286,7 +286,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c) 
		/* GXm supports extended cpuid levels 'ala' AMD */

		if (c->cpuid_level == 2) {

			/* Enable cxMMX extensions (GX1 Datasheet 54) */

			setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1);

			setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1);



			/*

			 * GXm : 0x30 ... 0x5f GXm  datasheet 51
@@ -309,7 +309,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c) 
		if (dir1 > 7) {

			dir0_msn++;  /* M II */

			/* Enable MMX extensions (App note 108) */

			setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);

			setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1);

		} else {

			c->coma_bug = 1;      /* 6x86MX, it has the bug. */

		}
@@ -424,7 +424,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c) 
			local_irq_save(flags);

			ccr3 = getCx86(CX86_CCR3);

			setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10);       /* enable MAPEN  */

			setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80);  /* enable cpuid  */

			setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80);  /* enable cpuid  */

			setCx86(CX86_CCR3, ccr3);                       /* disable MAPEN */

			local_irq_restore(flags);

		}

include/asm-x86/processor-cyrix.h

+8 −0
Original line number Diff line number Diff line
@@ -28,3 +28,11 @@ static inline void setCx86(u8 reg, u8 data) 
	outb(reg, 0x22);

	outb(data, 0x23);

}



#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })



#define setCx86_old(reg, data) do { \

	outb((reg), 0x22); \

	outb((data), 0x23); \

} while (0)