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Commit 0189efb8 authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller
Browse files

qed*: Fix Kconfig dependencies with INFINIBAND_QEDR 



The qedr driver would require a tristate Kconfig option [to allow
it to compile as a module], and toward that end we've added the
INFINIBAND_QEDR option. But as we've made the compilation of the
qed/qede infrastructure required for RoCE dependent on the option
we'd be facing linking difficulties in case that QED=y or QEDE=y,
and INFINIBAND_QEDR=m.

To resolve this, we seperate between the INFINIBAND_QEDR option
and the infrastructure support in qed/qede by introducing a new
QED_RDMA option which would be selected by INFINIBAND_QEDR but would
be a boolean instead of a tristate; Following that, the qed/qede is
fixed based on this new option so that all config combinations would
be supported.

Fixes: cee9fbd8 ("qede: add qedr framework")
Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarYuval Mintz <Yuval.Mintz@caviumnetworks.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ce6b04ee

drivers/net/ethernet/qlogic/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -107,10 +107,14 @@ config QEDE 
	---help---

	  This enables the support for ...



config QED_RDMA

	bool



config INFINIBAND_QEDR

	tristate "QLogic qede RoCE sources [debug]"

	depends on QEDE && 64BIT

	select QED_LL2

	select QED_RDMA

	default n

	---help---

	  This provides a temporary node that allows the compilation

drivers/net/ethernet/qlogic/qed/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,4 +5,4 @@ qed-y := qed_cxt.o qed_dev.o qed_hw.o qed_init_fw_funcs.o qed_init_ops.o \ 
	 qed_selftest.o qed_dcbx.o qed_debug.o

qed-$(CONFIG_QED_SRIOV) += qed_sriov.o qed_vf.o

qed-$(CONFIG_QED_LL2) += qed_ll2.o

qed-$(CONFIG_INFINIBAND_QEDR) += qed_roce.o
 
qed-$(CONFIG_QED_RDMA) += qed_roce.o

drivers/net/ethernet/qlogic/qed/qed_cxt.c

+1 −6
Original line number Diff line number Diff line
@@ -47,13 +47,8 @@ 
#define TM_ALIGN        BIT(TM_SHIFT)

#define TM_ELEM_SIZE    4



/* ILT constants */

#if IS_ENABLED(CONFIG_INFINIBAND_QEDR)

/* For RoCE we configure to 64K to cover for RoCE max tasks 256K purpose. */

#define ILT_DEFAULT_HW_P_SIZE		4

#else

#define ILT_DEFAULT_HW_P_SIZE		3

#endif

#define ILT_DEFAULT_HW_P_SIZE	(IS_ENABLED(CONFIG_QED_RDMA) ? 4 : 3)



#define ILT_PAGE_IN_BYTES(hw_p_size)	(1U << ((hw_p_size) + 12))

#define ILT_CFG_REG(cli, reg)	PSWRQ2_REG_ ## cli ## _ ## reg ## _RT_OFFSET

drivers/net/ethernet/qlogic/qed/qed_dev.c

+7 −7
Original line number Diff line number Diff line
@@ -1422,19 +1422,19 @@ static void qed_hw_set_feat(struct qed_hwfn *p_hwfn) 
	u32 *feat_num = p_hwfn->hw_info.feat_num;

	int num_features = 1;



#if IS_ENABLED(CONFIG_INFINIBAND_QEDR)

	/* Roce CNQ each requires: 1 status block + 1 CNQ. We divide the

	 * status blocks equally between L2 / RoCE but with consideration as

	 * to how many l2 queues / cnqs we have

	if (IS_ENABLED(CONFIG_QED_RDMA) &&

	    p_hwfn->hw_info.personality == QED_PCI_ETH_ROCE) {

		/* Roce CNQ each requires: 1 status block + 1 CNQ. We divide

		 * the status blocks equally between L2 / RoCE but with

		 * consideration as to how many l2 queues / cnqs we have.

		 */

	if (p_hwfn->hw_info.personality == QED_PCI_ETH_ROCE) {

		num_features++;



		feat_num[QED_RDMA_CNQ] =

			min_t(u32, RESC_NUM(p_hwfn, QED_SB) / num_features,

			      RESC_NUM(p_hwfn, QED_RDMA_CNQ_RAM));

	}

#endif



	feat_num[QED_PF_L2_QUE] = min_t(u32, RESC_NUM(p_hwfn, QED_SB) /

						num_features,

					RESC_NUM(p_hwfn, QED_L2_QUEUE));

drivers/net/ethernet/qlogic/qed/qed_ll2.c

+1 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 
#include "qed_mcp.h"

#include "qed_reg_addr.h"

#include "qed_sp.h"

#include "qed_roce.h"



#define QED_LL2_RX_REGISTERED(ll2)	((ll2)->rx_queue.b_cb_registred)

#define QED_LL2_TX_REGISTERED(ll2)	((ll2)->tx_queue.b_cb_registred)