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Commit 017b5522 authored by Alexandre Belloni's avatar Alexandre Belloni Committed by Maxime Ripard
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ARM: at91: Add new binding for sama5d3-ddramc 



The IP for the SDRAM controller found on sama5d3 SoCs is different from the g45
one. Introduce a new compatible string to reflect that.

Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 7171511e

Documentation/devicetree/bindings/arm/atmel-at91.txt

+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ RAMC SDRAM/DDR Controller required properties: 
- compatible: Should be "atmel,at91rm9200-sdramc",

			"atmel,at91sam9260-sdramc",

			"atmel,at91sam9g45-ddramc",

			"atmel,sama5d3-ddramc",

- reg: Should contain registers location and length

  For at91sam9263 and at91sam9g45 you must specify 2 entries.

arch/arm/mach-at91/setup.c

+1 −0
Original line number Diff line number Diff line
@@ -384,6 +384,7 @@ static struct of_device_id ramc_ids[] = { 
	{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },

	{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },

	{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },

	{ .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby },

	{ /*sentinel*/ }

};