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Commit 01575776 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

drm/omap: cleanup dispc_mgr_lclk_rate() 



With the new PLL helpers, we can clean up the dispc_mgr_lclk_rate().
This will also make dispc_mgr_lclk_rate() support clock sources it
didn't support earlier.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 5670bd72

drivers/gpu/drm/omapdrm/dss/dispc.c

+17 −29
Original line number Diff line number Diff line
@@ -3330,43 +3330,31 @@ static unsigned long dispc_fclk_rate(void) 


static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)

{

	struct dss_pll *pll;

	int lcd;

	unsigned long r;

	u32 l;

	enum dss_clk_source src;



	if (dss_mgr_is_lcd(channel)) {

		l = dispc_read_reg(DISPC_DIVISORo(channel));

	/* for TV, LCLK rate is the FCLK rate */

	if (!dss_mgr_is_lcd(channel))

		return dispc_fclk_rate();



		lcd = FLD_GET(l, 23, 16);

	src = dss_get_lcd_clk_source(channel);



		switch (dss_get_lcd_clk_source(channel)) {

		case DSS_CLK_SRC_FCK:

	if (src == DSS_CLK_SRC_FCK) {

		r = dss_get_dispc_clk_rate();

			break;

		case DSS_CLK_SRC_PLL1_1:

			pll = dss_pll_find("dsi0");

			if (!pll)

				pll = dss_pll_find("video0");

	} else {

		struct dss_pll *pll;

		unsigned clkout_idx;



			r = pll->cinfo.clkout[0];

			break;

		case DSS_CLK_SRC_PLL2_1:

			pll = dss_pll_find("dsi1");

			if (!pll)

				pll = dss_pll_find("video1");

		pll = dss_pll_find_by_src(src);

		clkout_idx = dss_pll_get_clkout_idx_for_src(src);



			r = pll->cinfo.clkout[0];

			break;

		default:

			BUG();

			return 0;

		r = pll->cinfo.clkout[clkout_idx];

	}



	lcd = REG_GET(DISPC_DIVISORo(channel), 23, 16);



	return r / lcd;

	} else {

		return dispc_fclk_rate();

	}

}



static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)