Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 009c200a authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ralf Baechle
Browse files

MIPS: DEC: Convert to new irq_chip functions



Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2178/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 93f29361
Loading
Loading
Loading
Loading
+14 −46
Original line number Diff line number Diff line
@@ -17,80 +17,48 @@
#include <asm/dec/ioasic_addrs.h>
#include <asm/dec/ioasic_ints.h>


static int ioasic_irq_base;


static inline void unmask_ioasic_irq(unsigned int irq)
static void unmask_ioasic_irq(struct irq_data *d)
{
	u32 simr;

	simr = ioasic_read(IO_REG_SIMR);
	simr |= (1 << (irq - ioasic_irq_base));
	simr |= (1 << (d->irq - ioasic_irq_base));
	ioasic_write(IO_REG_SIMR, simr);
}

static inline void mask_ioasic_irq(unsigned int irq)
static void mask_ioasic_irq(struct irq_data *d)
{
	u32 simr;

	simr = ioasic_read(IO_REG_SIMR);
	simr &= ~(1 << (irq - ioasic_irq_base));
	simr &= ~(1 << (d->irq - ioasic_irq_base));
	ioasic_write(IO_REG_SIMR, simr);
}

static inline void clear_ioasic_irq(unsigned int irq)
static void ack_ioasic_irq(struct irq_data *d)
{
	u32 sir;

	sir = ~(1 << (irq - ioasic_irq_base));
	ioasic_write(IO_REG_SIR, sir);
}

static inline void ack_ioasic_irq(unsigned int irq)
{
	mask_ioasic_irq(irq);
	mask_ioasic_irq(d);
	fast_iob();
}

static inline void end_ioasic_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
		unmask_ioasic_irq(irq);
}

static struct irq_chip ioasic_irq_type = {
	.name = "IO-ASIC",
	.ack = ack_ioasic_irq,
	.mask = mask_ioasic_irq,
	.mask_ack = ack_ioasic_irq,
	.unmask = unmask_ioasic_irq,
	.irq_ack = ack_ioasic_irq,
	.irq_mask = mask_ioasic_irq,
	.irq_mask_ack = ack_ioasic_irq,
	.irq_unmask = unmask_ioasic_irq,
};


#define unmask_ioasic_dma_irq unmask_ioasic_irq

#define mask_ioasic_dma_irq mask_ioasic_irq

#define ack_ioasic_dma_irq ack_ioasic_irq

static inline void end_ioasic_dma_irq(unsigned int irq)
{
	clear_ioasic_irq(irq);
	fast_iob();
	end_ioasic_irq(irq);
}

static struct irq_chip ioasic_dma_irq_type = {
	.name = "IO-ASIC-DMA",
	.ack = ack_ioasic_dma_irq,
	.mask = mask_ioasic_dma_irq,
	.mask_ack = ack_ioasic_dma_irq,
	.unmask = unmask_ioasic_dma_irq,
	.end = end_ioasic_dma_irq,
	.irq_ack = ack_ioasic_irq,
	.irq_mask = mask_ioasic_irq,
	.irq_mask_ack = ack_ioasic_irq,
	.irq_unmask = unmask_ioasic_irq,
};


void __init init_ioasic_irqs(int base)
{
	int i;
+10 −13
Original line number Diff line number Diff line
@@ -27,43 +27,40 @@
 */
u32 cached_kn02_csr;


static int kn02_irq_base;


static inline void unmask_kn02_irq(unsigned int irq)
static void unmask_kn02_irq(struct irq_data *d)
{
	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
						       KN02_CSR);

	cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
	cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16));
	*csr = cached_kn02_csr;
}

static inline void mask_kn02_irq(unsigned int irq)
static void mask_kn02_irq(struct irq_data *d)
{
	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
						       KN02_CSR);

	cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
	cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16));
	*csr = cached_kn02_csr;
}

static void ack_kn02_irq(unsigned int irq)
static void ack_kn02_irq(struct irq_data *d)
{
	mask_kn02_irq(irq);
	mask_kn02_irq(d);
	iob();
}

static struct irq_chip kn02_irq_type = {
	.name = "KN02-CSR",
	.ack = ack_kn02_irq,
	.mask = mask_kn02_irq,
	.mask_ack = ack_kn02_irq,
	.unmask = unmask_kn02_irq,
	.irq_ack = ack_kn02_irq,
	.irq_mask = mask_kn02_irq,
	.irq_mask_ack = ack_kn02_irq,
	.irq_unmask = unmask_kn02_irq,
};


void __init init_kn02_irqs(int base)
{
	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +