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Commit 0052bc5d authored by Kumar Gala's avatar Kumar Gala
Browse files

[POWERPC] 85xx: Port TQM85xx boards over from arch/ppc 



Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 77e03a22

arch/powerpc/boot/dts/tqm8540.dts

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+204 −0
Original line number Diff line number Diff line 
/*

 * TQM 8540 Device Tree Source

 *

 * Copyright 2008 Freescale Semiconductor Inc.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	model = "tqm,8540";

	compatible = "tqm,8540", "tqm,85xx";

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &enet0;

		ethernet1 = &enet1;

		ethernet2 = &enet2;

		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,8540@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <32768>;

			i-cache-size = <32768>;

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x10000000>;

	};



	soc8540@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "soc";

		ranges = <0x0 0xe0000000 0x100000>;

		reg = <0xe0000000 0x200>;

		bus-frequency = <0>;

		compatible = "fsl,mpc8540-immr", "simple-bus";



		memory-controller@2000 {

			compatible = "fsl,8540-memory-controller";

			reg = <0x2000 0x1000>;

			interrupt-parent = <&mpic>;

			interrupts = <18 2>;

		};



		l2-cache-controller@20000 {

			compatible = "fsl,8540-l2-cache-controller";

			reg = <0x20000 0x1000>;

			cache-line-size = <32>;

			cache-size = <0x40000>;	// L2, 256K

			interrupt-parent = <&mpic>;

			interrupts = <16 2>;

		};



		i2c@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			cell-index = <0>;

			compatible = "fsl-i2c";

			reg = <0x3000 0x100>;

			interrupts = <43 2>;

			interrupt-parent = <&mpic>;

			dfsrr;



			rtc@68 {

				compatible = "dallas,ds1337";

				reg = <0x68>;

			};

		};



		mdio@24520 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,gianfar-mdio";

			reg = <0x24520 0x20>;



			phy1: ethernet-phy@1 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <1>;

				device_type = "ethernet-phy";

			};

			phy2: ethernet-phy@2 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <2>;

				device_type = "ethernet-phy";

			};

			phy3: ethernet-phy@3 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <3>;

				device_type = "ethernet-phy";

			};

		};



		enet0: ethernet@24000 {

			cell-index = <0>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x24000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <29 2 30 2 34 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy2>;

		};



		enet1: ethernet@25000 {

			cell-index = <1>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x25000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <35 2 36 2 40 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy1>;

		};



		enet2: ethernet@26000 {

			cell-index = <2>;

			device_type = "network";

			model = "FEC";

			compatible = "gianfar";

			reg = <0x26000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <41 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy3>;

		};



		serial0: serial@4500 {

			cell-index = <0>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4500 0x100>; 	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		serial1: serial@4600 {

			cell-index = <1>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4600 0x100>;	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		mpic: pic@40000 {

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <0x40000 0x40000>;

			device_type = "open-pic";

		};

	};



	pci0: pci@e0008000 {

		cell-index = <0>;

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";

		device_type = "pci";

		reg = <0xe0008000 0x1000>;

		clock-frequency = <66666666>;

		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;

		interrupt-map = <

				/* IDSEL 28 */

				 0xe000 0 0 1 &mpic 2 1

				 0xe000 0 0 2 &mpic 3 1>;



		interrupt-parent = <&mpic>;

		interrupts = <24 2>;

		bus-range = <0 0>;

		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000

			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;

	};

};

arch/powerpc/boot/dts/tqm8541.dts

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/*

 * TQM 8541 Device Tree Source

 *

 * Copyright 2008 Freescale Semiconductor Inc.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	model = "tqm,8541";

	compatible = "tqm,8541", "tqm,85xx";

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &enet0;

		ethernet1 = &enet1;

		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,8541@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <32768>;

			i-cache-size = <32768>;

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x10000000>;

	};



	soc8541@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "soc";

		ranges = <0x0 0xe0000000 0x100000>;

		reg = <0xe0000000 0x200>;

		bus-frequency = <0>;

		compatible = "fsl,mpc8541-immr", "simple-bus";



		memory-controller@2000 {

			compatible = "fsl,8540-memory-controller";

			reg = <0x2000 0x1000>;

			interrupt-parent = <&mpic>;

			interrupts = <18 2>;

		};



		l2-cache-controller@20000 {

			compatible = "fsl,8540-l2-cache-controller";

			reg = <0x20000 0x1000>;

			cache-line-size = <32>;

			cache-size = <0x40000>;	// L2, 256K

			interrupt-parent = <&mpic>;

			interrupts = <16 2>;

		};



		i2c@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			cell-index = <0>;

			compatible = "fsl-i2c";

			reg = <0x3000 0x100>;

			interrupts = <43 2>;

			interrupt-parent = <&mpic>;

			dfsrr;



			rtc@68 {

				compatible = "dallas,ds1337";

				reg = <0x68>;

			};

		};



		mdio@24520 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,gianfar-mdio";

			reg = <0x24520 0x20>;



			phy1: ethernet-phy@1 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <1>;

				device_type = "ethernet-phy";

			};

			phy2: ethernet-phy@2 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <2>;

				device_type = "ethernet-phy";

			};

			phy3: ethernet-phy@3 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <3>;

				device_type = "ethernet-phy";

			};

		};



		enet0: ethernet@24000 {

			cell-index = <0>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x24000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <29 2 30 2 34 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy2>;

		};



		enet1: ethernet@25000 {

			cell-index = <1>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x25000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <35 2 36 2 40 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy1>;

		};



		serial0: serial@4500 {

			cell-index = <0>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4500 0x100>; 	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		serial1: serial@4600 {

			cell-index = <1>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4600 0x100>;	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		mpic: pic@40000 {

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <0x40000 0x40000>;

			device_type = "open-pic";

		};



		cpm@919c0 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus";

			reg = <0x919c0 0x30>;

			ranges;



			muram@80000 {

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x80000 0x10000>;



				data@0 {

					compatible = "fsl,cpm-muram-data";

					reg = <0 0x2000 0x9000 0x1000>;

				};

			};



			brg@919f0 {

				compatible = "fsl,mpc8541-brg",

				             "fsl,cpm2-brg",

				             "fsl,cpm-brg";

				reg = <0x919f0 0x10 0x915f0 0x10>;

				clock-frequency = <0>;

			};



			cpmpic: pic@90c00 {

				interrupt-controller;

				#address-cells = <0>;

				#interrupt-cells = <2>;

				interrupts = <46 2>;

				interrupt-parent = <&mpic>;

				reg = <0x90c00 0x80>;

				compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";

			};

		};

	};



	pci0: pci@e0008000 {

		cell-index = <0>;

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";

		device_type = "pci";

		reg = <0xe0008000 0x1000>;

		clock-frequency = <66666666>;

		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;

		interrupt-map = <

				/* IDSEL 28 */

				 0xe000 0 0 1 &mpic 2 1

				 0xe000 0 0 2 &mpic 3 1>;



		interrupt-parent = <&mpic>;

		interrupts = <24 2>;

		bus-range = <0 0>;

		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000

			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;

	};

};

arch/powerpc/boot/dts/tqm8555.dts

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/*

 * TQM 8555 Device Tree Source

 *

 * Copyright 2008 Freescale Semiconductor Inc.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	model = "tqm,8555";

	compatible = "tqm,8555", "tqm,85xx";

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &enet0;

		ethernet1 = &enet1;

		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,8555@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <32768>;

			i-cache-size = <32768>;

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x10000000>;

	};



	soc8555@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "soc";

		ranges = <0x0 0xe0000000 0x100000>;

		reg = <0xe0000000 0x200>;

		bus-frequency = <0>;

		compatible = "fsl,mpc8555-immr", "simple-bus";



		memory-controller@2000 {

			compatible = "fsl,8540-memory-controller";

			reg = <0x2000 0x1000>;

			interrupt-parent = <&mpic>;

			interrupts = <18 2>;

		};



		l2-cache-controller@20000 {

			compatible = "fsl,8540-l2-cache-controller";

			reg = <0x20000 0x1000>;

			cache-line-size = <32>;

			cache-size = <0x40000>;	// L2, 256K

			interrupt-parent = <&mpic>;

			interrupts = <16 2>;

		};



		i2c@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			cell-index = <0>;

			compatible = "fsl-i2c";

			reg = <0x3000 0x100>;

			interrupts = <43 2>;

			interrupt-parent = <&mpic>;

			dfsrr;



			rtc@68 {

				compatible = "dallas,ds1337";

				reg = <0x68>;

			};

		};



		mdio@24520 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,gianfar-mdio";

			reg = <0x24520 0x20>;



			phy1: ethernet-phy@1 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <1>;

				device_type = "ethernet-phy";

			};

			phy2: ethernet-phy@2 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <2>;

				device_type = "ethernet-phy";

			};

			phy3: ethernet-phy@3 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <3>;

				device_type = "ethernet-phy";

			};

		};



		enet0: ethernet@24000 {

			cell-index = <0>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x24000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <29 2 30 2 34 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy2>;

		};



		enet1: ethernet@25000 {

			cell-index = <1>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x25000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <35 2 36 2 40 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy1>;

		};



		serial0: serial@4500 {

			cell-index = <0>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4500 0x100>; 	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		serial1: serial@4600 {

			cell-index = <1>;

			device_type = "serial";

			compatible = "ns16550";

			reg = <0x4600 0x100>;	// reg base, size

			clock-frequency = <0>; 	// should we fill in in uboot?

			interrupts = <42 2>;

			interrupt-parent = <&mpic>;

		};



		mpic: pic@40000 {

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <0x40000 0x40000>;

			device_type = "open-pic";

		};



		cpm@919c0 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus";

			reg = <0x919c0 0x30>;

			ranges;



			muram@80000 {

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x80000 0x10000>;



				data@0 {

					compatible = "fsl,cpm-muram-data";

					reg = <0 0x2000 0x9000 0x1000>;

				};

			};



			brg@919f0 {

				compatible = "fsl,mpc8555-brg",

				             "fsl,cpm2-brg",

				             "fsl,cpm-brg";

				reg = <0x919f0 0x10 0x915f0 0x10>;

				clock-frequency = <0>;

			};



			cpmpic: pic@90c00 {

				interrupt-controller;

				#address-cells = <0>;

				#interrupt-cells = <2>;

				interrupts = <46 2>;

				interrupt-parent = <&mpic>;

				reg = <0x90c00 0x80>;

				compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";

			};

		};

	};



	pci0: pci@e0008000 {

		cell-index = <0>;

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";

		device_type = "pci";

		reg = <0xe0008000 0x1000>;

		clock-frequency = <66666666>;

		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;

		interrupt-map = <

				/* IDSEL 28 */

				 0xe000 0 0 1 &mpic 2 1

				 0xe000 0 0 2 &mpic 3 1>;



		interrupt-parent = <&mpic>;

		interrupts = <24 2>;

		bus-range = <0 0>;

		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000

			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;

	};

};

arch/powerpc/boot/dts/tqm8560.dts

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Original line number Diff line number Diff line 
/*

 * TQM 8560 Device Tree Source

 *

 * Copyright 2008 Freescale Semiconductor Inc.

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	model = "tqm,8560";

	compatible = "tqm,8560", "tqm,85xx";

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &enet0;

		ethernet1 = &enet1;

		ethernet2 = &enet2;

		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,8560@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <32768>;

			i-cache-size = <32768>;

			timebase-frequency = <0>;

			bus-frequency = <0>;

			clock-frequency = <0>;

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x10000000>;

	};



	soc8560@e0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		device_type = "soc";

		ranges = <0x0 0xe0000000 0x100000>;

		reg = <0xe0000000 0x200>;

		bus-frequency = <0>;

		compatible = "fsl,mpc8560-immr", "simple-bus";



		memory-controller@2000 {

			compatible = "fsl,8540-memory-controller";

			reg = <0x2000 0x1000>;

			interrupt-parent = <&mpic>;

			interrupts = <18 2>;

		};



		l2-cache-controller@20000 {

			compatible = "fsl,8540-l2-cache-controller";

			reg = <0x20000 0x1000>;

			cache-line-size = <32>;

			cache-size = <0x40000>;	// L2, 256K

			interrupt-parent = <&mpic>;

			interrupts = <16 2>;

		};



		i2c@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			cell-index = <0>;

			compatible = "fsl-i2c";

			reg = <0x3000 0x100>;

			interrupts = <43 2>;

			interrupt-parent = <&mpic>;

			dfsrr;



			rtc@68 {

				compatible = "dallas,ds1337";

				reg = <0x68>;

			};

		};



		mdio@24520 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,gianfar-mdio";

			reg = <0x24520 0x20>;



			phy1: ethernet-phy@1 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <1>;

				device_type = "ethernet-phy";

			};

			phy2: ethernet-phy@2 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <2>;

				device_type = "ethernet-phy";

			};

			phy3: ethernet-phy@3 {

				interrupt-parent = <&mpic>;

				interrupts = <8 1>;

				reg = <3>;

				device_type = "ethernet-phy";

			};

		};



		enet0: ethernet@24000 {

			cell-index = <0>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x24000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <29 2 30 2 34 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy2>;

		};



		enet1: ethernet@25000 {

			cell-index = <1>;

			device_type = "network";

			model = "TSEC";

			compatible = "gianfar";

			reg = <0x25000 0x1000>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <35 2 36 2 40 2>;

			interrupt-parent = <&mpic>;

			phy-handle = <&phy1>;

		};



		mpic: pic@40000 {

			interrupt-controller;

			#address-cells = <0>;

			#interrupt-cells = <2>;

			reg = <0x40000 0x40000>;

			device_type = "open-pic";

		};



		cpm@919c0 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";

			reg = <0x919c0 0x30>;

			ranges;



			muram@80000 {

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x80000 0x10000>;



				data@0 {

					compatible = "fsl,cpm-muram-data";

					reg = <0 0x4000 0x9000 0x2000>;

				};

			};



			brg@919f0 {

				compatible = "fsl,mpc8560-brg",

				             "fsl,cpm2-brg",

				             "fsl,cpm-brg";

				reg = <0x919f0 0x10 0x915f0 0x10>;

				clock-frequency = <0>;

			};



			cpmpic: pic@90c00 {

				interrupt-controller;

				#address-cells = <0>;

				#interrupt-cells = <2>;

				interrupts = <46 2>;

				interrupt-parent = <&mpic>;

				reg = <0x90c00 0x80>;

				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";

			};



			serial0: serial@91a00 {

				device_type = "serial";

				compatible = "fsl,mpc8560-scc-uart",

				             "fsl,cpm2-scc-uart";

				reg = <0x91a00 0x20 0x88000 0x100>;

				fsl,cpm-brg = <1>;

				fsl,cpm-command = <0x800000>;

				current-speed = <115200>;

				interrupts = <40 8>;

				interrupt-parent = <&cpmpic>;

			};



			serial1: serial@91a20 {

				device_type = "serial";

				compatible = "fsl,mpc8560-scc-uart",

				             "fsl,cpm2-scc-uart";

				reg = <0x91a20 0x20 0x88100 0x100>;

				fsl,cpm-brg = <2>;

				fsl,cpm-command = <0x4a00000>;

				current-speed = <115200>;

				interrupts = <41 8>;

				interrupt-parent = <&cpmpic>;

			};



			enet2: ethernet@91340 {

				device_type = "network";

				compatible = "fsl,mpc8560-fcc-enet",

				             "fsl,cpm2-fcc-enet";

				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;

				local-mac-address = [ 00 00 00 00 00 00 ];

				fsl,cpm-command = <0x1a400300>;

				interrupts = <34 8>;

				interrupt-parent = <&cpmpic>;

				phy-handle = <&phy3>;

			};

		};

	};



	pci0: pci@e0008000 {

		cell-index = <0>;

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";

		device_type = "pci";

		reg = <0xe0008000 0x1000>;

		clock-frequency = <66666666>;

		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;

		interrupt-map = <

				/* IDSEL 28 */

				 0xe000 0 0 1 &mpic 2 1

				 0xe000 0 0 2 &mpic 3 1>;



		interrupt-parent = <&mpic>;

		interrupts = <24 2>;

		bus-range = <0 0>;

		ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000

			  0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;

	};

};