Merge branch 'topic/mv_xor' into for-linus

* Marvell XOR v2 engines

Required properties:

- compatible: one of the following values:

    "marvell,armada-7k-xor"

    "marvell,xor-v2"

- reg: Should contain registers location and length (two sets)

    the first set is the DMA registers

    the second set is the global registers

- msi-parent: Phandle to the MSI-capable interrupt controller used for

  interrupts.

Optional properties:

- clocks: Optional reference to the clock used by the XOR engine.

Example:

	xor0@400000 {

		compatible = "marvell,xor-v2";

		reg = <0x400000 0x1000>,

		      <0x410000 0x1000>;

		msi-parent = <&gic_v2m0>;

		dma-coherent;

	};

	---help---

	  Enable support for the Marvell XOR engine.

config MV_XOR_V2

	bool "Marvell XOR engine version 2 support "

	depends on ARM64

	select DMA_ENGINE

	select DMA_ENGINE_RAID

	select ASYNC_TX_ENABLE_CHANNEL_SWITCH

	select GENERIC_MSI_IRQ_DOMAIN

	---help---

	  Enable support for the Marvell version 2 XOR engine.

	  This engine provides acceleration for copy, XOR and RAID6

	  operations, and is available on Marvell Armada 7K and 8K

	  platforms.

config MXS_DMA

	bool "MXS DMA support"

	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL

obj-$(CONFIG_MOXART_DMA) += moxart-dma.o

obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o

obj-$(CONFIG_MV_XOR) += mv_xor.o

obj-$(CONFIG_MV_XOR_V2) += mv_xor_v2.o

obj-$(CONFIG_MXS_DMA) += mxs-dma.o

obj-$(CONFIG_MX3_IPU) += ipu/

obj-$(CONFIG_NBPFAXI_DMA) += nbpfaxi.o