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Commit 00136114 authored by Charan Teja Reddy's avatar Charan Teja Reddy
Browse files

ARM: dts: msm: add bus id, actlr settings for lito 

Add bus id's and ACTLR settings for SMMU on Lito. Bus id's enables the
clock between two nodes and actlr is used for performance tuning.

Change-Id: I3a3ccd018434e0016873843935f2607e12d02a07
parent 5ade36d8

qcom/msm-arm-smmu-lito.dtsi

+147 −0
Original line number Diff line number Diff line
@@ -14,6 +14,16 @@ 
		#size-cells = <1>;

		#address-cells = <1>;

		ranges;

		qcom,regulator-names = "vdd";

		vdd-supply = <&gpu_cx_gdsc>;



		clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,

			 <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,

			 <&gpucc GPU_CC_AHB_CLK>;

		clock-names = "gcc_gpu_memnoc_gfx",

			      "gcc_gpu_snoc_dvm_gfx",

			      "gpu_cc_ahb";



		interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
@@ -23,6 +33,23 @@ 
				<GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>;



		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_GPU_TCU>,

			<MSM_BUS_SLAVE_EBI_CH0>,

			<0 0>,

			<MSM_BUS_MASTER_GPU_TCU>,

			<MSM_BUS_SLAVE_EBI_CH0>,

			<0 1000>;



		qcom,actlr =

			/* All CBs of GFX: +15 deep PF */

			<0x2 0x400 0x303>,

			<0x4 0x400 0x303>,

			<0x5 0x400 0x303>,

			<0x7 0x400 0x303>,

			<0x0 0x401 0x303>;



		gfx_0_tbu: gfx_0_tbu@3dc5000 {

			compatible = "qcom,qsmmuv500-tbu";

			reg = <0x3dc5000 0x1000>,
@@ -133,6 +160,32 @@ 
				<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;

		qcom,msm-bus,name = "apps_smmu";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,active-only;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_GEM_NOC_SNOC>,

			<MSM_BUS_SLAVE_IMEM_CFG>,

			<0 0>,

			<MSM_BUS_MASTER_GEM_NOC_SNOC>,

			<MSM_BUS_SLAVE_IMEM_CFG>,

			<0 1000>;



		qcom,actlr =

			/* For HF-0 TBU +3 deep PF */

			<0x800 0x3ff 0x103>,

			/* For HF-1 TBU +3 deep PF */

			<0xc00 0x3ff 0x103>,

			/* For SF-0 TBU +3 deep PF */

			<0x1000 0x3ff 0x103>,

			/* For NPU +3 deep PF */

			<0x1861 0x400 0x103>,

			<0x1862 0x400 0x103>,

			<0x1863 0x404 0x103>,

			<0x1864 0x400 0x103>,

			<0x1865 0x400 0x103>,

			<0x1868 0x400 0x103>;



		anoc_1_tbu: anoc_1_tbu@15185000 {

			compatible = "qcom,qsmmuv500-tbu";
@@ -140,6 +193,17 @@ 
				<0x15182200 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x0 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		anoc_2_tbu: anoc_2_tbu@15189000 {
@@ -148,6 +212,17 @@ 
				<0x15182208 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x400 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		mnoc_hf_0_tbu: mnoc_hf_0_tbu@1518d000 {
@@ -156,6 +231,19 @@ 
				<0x15182210 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x800 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;

			qcom,msm-bus,name = "mnoc_hf_0_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 1000>;

		};



		mnoc_hf_1_tbu: mnoc_hf_1_tbu@15191000 {
@@ -164,6 +252,19 @@ 
				<0x15182218 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0xc00 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>;

			qcom,msm-bus,name = "mnoc_hf_1_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_MDP_PORT0>,

				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,

				<0 1000>;

		};



		mnoc_sf_0_tbu: mnoc_sf_0_tbu@15195000 {
@@ -172,6 +273,19 @@ 
				<0x15182220 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1000 0x400>;

			qcom,regulator-names = "vdd";

			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc>;

			qcom,msm-bus,name = "mnoc_sf_0_tbu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_CAMNOC_SF>,

				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,

				<0 1000>;

		};



		adsp_tbu: adsp_tbu@15199000 {
@@ -180,6 +294,17 @@ 
				<0x15182228 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1400 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 0>,

				<MSM_BUS_MASTER_GEM_NOC_SNOC>,

				<MSM_BUS_SLAVE_IMEM_CFG>,

				<0 1000>;

		};



		compute_dsp_0_tbu: compute_dsp_0_tbu@1519d000 {
@@ -188,6 +313,17 @@ 
				<0x15182230 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1800 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 1000>;

		};



		compute_dsp_1_tbu: compute_dsp_1_tbu@151a1000 {
@@ -196,6 +332,17 @@ 
				<0x15182238 0x8>;

			reg-names = "base", "status-reg";

			qcom,stream-id-range = <0x1c00 0x400>;

			qcom,msm-bus,name = "apps_smmu";

			qcom,msm-bus,num-cases = <2>;

			qcom,msm-bus,active-only;

			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps =

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 0>,

				<MSM_BUS_MASTER_NPU>,

				<MSM_BUS_SLAVE_CDSP_MEM_NOC>,

				<0 1000>;

		};

	};