From 387562df323d67988381455381ec472a8d268a79 Mon Sep 17 00:00:00 2001 From: xiaoy3 Date: Thu, 26 Jul 2018 15:34:20 +0800 Subject: [PATCH] arm64: cpufeature: check translation granule size based on kernel config Warning log CPU features: SANITY CHECK: Unexpected variation in SYS_ID_AA64MMFR0_EL1. Boot CPU: 0x00000000001122, CPU4: 0x00000000101122 Unsupported CPU feature variation. ------------[ cut here ]------------ WARNING: CPU: 4 PID: 0 at /localrepo/hudson/workspace/PPO29_river-retail_userdebug_mp_r-shm2018_test-keys_continuous/platform/kernel/msm-4.9/arch/arm64/kernel/cpufeature.c:629 update_cpu_features+0x404/0x40c Modules linked in: CPU: 4 PID: 0 Comm: swapper/4 Not tainted 4.9.103-perf+ #1 Hardware name: river (DT) Change-Id: Ic89f20e22e9df60a04d1c1ea449f4864d33a5952 Signed-off-by: xiaoy3 Reviewed-on: https://gerrit.mot.com/1216822 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Zhenxin Xi Reviewed-by: Jichao Zou Submit-Approved: Jira Key Signed-off-by: Jackeagle --- arch/arm64/kernel/cpufeature.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 72c4171dcb25..e22f244cf104 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -126,9 +126,21 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = { static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = { ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 32, 0), +#ifdef CONFIG_ARM64_4K_PAGES S_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI), +#else + S_ARM64_FTR_BITS(FTR_NONSTRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI), +#endif +#ifdef CONFIG_AARM64_64K_PAGES S_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI), +#else + S_ARM64_FTR_BITS(FTR_NONSTRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI), +#endif +#ifdef CONFIG_AARM64_16K_PAGES ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI), +#else + ARM64_FTR_BITS(FTR_NONSTRICT, FTR_EXACT, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI), +#endif ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR0_BIGENDEL0_SHIFT, 4, 0), /* Linux shouldn't care about secure memory */ ARM64_FTR_BITS(FTR_NONSTRICT, FTR_EXACT, ID_AA64MMFR0_SNSMEM_SHIFT, 4, 0), -- GitLab