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Commit ff30f4a3 authored by Alan Kwong's avatar Alan Kwong
Browse files

drm/msm/sde: set default bw to max bw in device tree 



Current bandwidth is set to 6GB by default. This is too
low for some use cases. Change the default bandwidth to
maximum defined in device tree to support all use cases.
Default bandwidth is used if user mode control does provide
any override. Also, reduce the enable bandwidth to 2MB for
apps RSC.

CRs-Fixed: 2037879
Change-Id: I6a6b26a3c14bc40893d8aa57470fdac684d4ac31
Signed-off-by: default avatarAlan Kwong <akwong@codeaurora.org>
parent 788b90b3

drivers/gpu/drm/msm/sde/sde_core_perf.c

+3 −1
Original line number Diff line number Diff line
@@ -169,7 +169,9 @@ int sde_core_perf_crtc_check(struct drm_crtc *crtc, 


	SDE_DEBUG("final threshold bw limit = %d\n", threshold);



	if (!threshold) {

	if (!sde_cstate->bw_control) {

		SDE_DEBUG("bypass bandwidth check\n");

	} else if (!threshold) {

		sde_cstate->new_perf = sde_cstate->cur_perf;

		SDE_ERROR("no bandwidth limits specified\n");

		return -E2BIG;

drivers/gpu/drm/msm/sde/sde_core_perf.h

+0 −2
Original line number Diff line number Diff line
@@ -22,8 +22,6 @@ 
#include "sde_power_handle.h"



#define	SDE_PERF_DEFAULT_MAX_CORE_CLK_RATE	320000000

#define	SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA	2000000000

#define	SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA	2000000000



/**

 * struct sde_core_perf_params - definition of performance parameters

drivers/gpu/drm/msm/sde/sde_crtc.c

+10 −4
Original line number Diff line number Diff line
@@ -2902,19 +2902,19 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
			CRTC_PROP_CORE_CLK);

	msm_property_install_range(&sde_crtc->property_info,

			"core_ab", 0x0, 0, U64_MAX,

			SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA,

			catalog->perf.max_bw_high * 1000ULL,

			CRTC_PROP_CORE_AB);

	msm_property_install_range(&sde_crtc->property_info,

			"core_ib", 0x0, 0, U64_MAX,

			SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA,

			catalog->perf.max_bw_high * 1000ULL,

			CRTC_PROP_CORE_IB);

	msm_property_install_range(&sde_crtc->property_info,

			"mem_ab", 0x0, 0, U64_MAX,

			SDE_PERF_DEFAULT_MAX_BUS_AB_QUOTA,

			catalog->perf.max_bw_high * 1000ULL,

			CRTC_PROP_MEM_AB);

	msm_property_install_range(&sde_crtc->property_info,

			"mem_ib", 0x0, 0, U64_MAX,

			SDE_PERF_DEFAULT_MAX_BUS_IB_QUOTA,

			catalog->perf.max_bw_high * 1000ULL,

			CRTC_PROP_MEM_IB);

	msm_property_install_range(&sde_crtc->property_info,

			"rot_prefill_bw", 0, 0, U64_MAX,
@@ -3040,6 +3040,12 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc, 
			case CRTC_PROP_ROI_V1:

				ret = _sde_crtc_set_roi_v1(state, (void *)val);

				break;

			case CRTC_PROP_CORE_AB:

			case CRTC_PROP_CORE_IB:

			case CRTC_PROP_MEM_AB:

			case CRTC_PROP_MEM_IB:

				cstate->bw_control = true;

				break;

			default:

				/* nothing to do */

				break;

drivers/gpu/drm/msm/sde/sde_crtc.h

+2 −0
Original line number Diff line number Diff line
@@ -255,6 +255,7 @@ struct sde_crtc_respool { 
 * @intf_mode     : Interface mode of the primary connector

 * @rsc_client    : sde rsc client when mode is valid

 * @is_ppsplit    : Whether current topology requires PPSplit special handling

 * @bw_control    : true if bw controlled by bw properties

 * @crtc_roi      : Current CRTC ROI. Possibly sub-rectangle of mode.

 *                  Origin top left of CRTC.

 * @lm_bounds     : LM boundaries based on current mode full resolution, no ROI.
@@ -280,6 +281,7 @@ struct sde_crtc_state { 
	enum sde_intf_mode intf_mode;

	struct sde_rsc_client *rsc_client;

	bool rsc_update;

	bool bw_control;



	bool is_ppsplit;

	struct sde_rect crtc_roi;

drivers/gpu/drm/msm/sde_power_handle.c

+28 −10
Original line number Diff line number Diff line
@@ -333,6 +333,31 @@ static int _sde_power_data_bus_set_quota( 
		return -EINVAL;

	}



	pdbus->ab_rt = ab_quota_rt;

	pdbus->ib_rt = ib_quota_rt;

	pdbus->ab_nrt = ab_quota_nrt;

	pdbus->ib_nrt = ib_quota_nrt;



	if (pdbus->enable) {

		ab_quota_rt = max_t(u64, ab_quota_rt,

				SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA);

		ib_quota_rt = max_t(u64, ib_quota_rt,

				SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);

		ab_quota_nrt = max_t(u64, ab_quota_nrt,

				SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA);

		ib_quota_nrt = max_t(u64, ib_quota_nrt,

				SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);

	} else {

		ab_quota_rt = max_t(u64, ab_quota_rt,

				SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA);

		ib_quota_rt = max_t(u64, ib_quota_rt,

				SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);

		ab_quota_nrt = max_t(u64, ab_quota_nrt,

				SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA);

		ib_quota_nrt = max_t(u64, ib_quota_nrt,

				SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);

	}



	if (!ab_quota_rt && !ab_quota_nrt && !ib_quota_rt && !ib_quota_nrt)  {

		new_uc_idx = 0;

	} else {
@@ -571,19 +596,12 @@ static int sde_power_data_bus_update(struct sde_power_data_bus_handle *pdbus, 
							bool enable)

{

	int rc = 0;

	u64 ab_quota_rt, ab_quota_nrt;

	u64 ib_quota_rt, ib_quota_nrt;



	ab_quota_rt = ab_quota_nrt = enable ?

			SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA :

			SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA;

	ib_quota_rt = ib_quota_nrt = enable ?

			SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA :

			SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA;

	pdbus->enable = enable;



	if (pdbus->data_bus_hdl)

		rc = _sde_power_data_bus_set_quota(pdbus, ab_quota_rt,

				ab_quota_nrt, ib_quota_rt, ib_quota_nrt);

		rc = _sde_power_data_bus_set_quota(pdbus, pdbus->ab_rt,

				pdbus->ab_nrt, pdbus->ib_rt, pdbus->ib_nrt);



	if (rc)

		pr_err("failed to set data bus vote rc=%d enable:%d\n",