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Commit ff17bf8a authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS fixes from Ralf Baechle:
 "Another round of MIPS fixes for 4.9:

   - Fix unreadable output in __do_page_fault due to the KERN_CONT
     patchset

   - Correctly handle MIPS R6 fixes to the c0_wired register"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: mm: Fix output of __do_page_fault
  MIPS: Mask out limit field when calculating wired entry count
parents d8e435f3 2a872a5d
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+6 −0
Original line number Diff line number Diff line
@@ -214,6 +214,12 @@
#error Bad page size configuration for hugetlbfs!
#endif

/*
 * Wired register bits
 */
#define MIPSR6_WIRED_LIMIT	(_ULCAST_(0xffff) << 16)
#define MIPSR6_WIRED_WIRED	(_ULCAST_(0xffff) << 0)

/*
 * Values used for computation of new tlb entries
 */
+13 −0
Original line number Diff line number Diff line
#ifndef __ASM_TLB_H
#define __ASM_TLB_H

#include <asm/cpu-features.h>
#include <asm/mipsregs.h>

/*
 * MIPS doesn't need any special per-pte or per-vma handling, except
 * we need to flush cache for area to be unmapped.
@@ -22,6 +25,16 @@
		((CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) |		\
		 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0))

static inline unsigned int num_wired_entries(void)
{
	unsigned int wired = read_c0_wired();

	if (cpu_has_mips_r6)
		wired &= MIPSR6_WIRED_WIRED;

	return wired;
}

#include <asm-generic/tlb.h>

#endif /* __ASM_TLB_H */
+5 −4
Original line number Diff line number Diff line
@@ -209,17 +209,18 @@ static void __kprobes __do_page_fault(struct pt_regs *regs, unsigned long write,
		if (show_unhandled_signals &&
		    unhandled_signal(tsk, SIGSEGV) &&
		    __ratelimit(&ratelimit_state)) {
			pr_info("\ndo_page_fault(): sending SIGSEGV to %s for invalid %s %0*lx",
			pr_info("do_page_fault(): sending SIGSEGV to %s for invalid %s %0*lx\n",
				tsk->comm,
				write ? "write access to" : "read access from",
				field, address);
			pr_info("epc = %0*lx in", field,
				(unsigned long) regs->cp0_epc);
			print_vma_addr(" ", regs->cp0_epc);
			print_vma_addr(KERN_CONT " ", regs->cp0_epc);
			pr_cont("\n");
			pr_info("ra  = %0*lx in", field,
				(unsigned long) regs->regs[31]);
			print_vma_addr(" ", regs->regs[31]);
			pr_info("\n");
			print_vma_addr(KERN_CONT " ", regs->regs[31]);
			pr_cont("\n");
		}
		current->thread.trap_nr = (regs->cp0_cause >> 2) & 0x1f;
		info.si_signo = SIGSEGV;
+2 −2
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot)
		writex_c0_entrylo1(entrylo);
	}
#endif
	tlbidx = read_c0_wired();
	tlbidx = num_wired_entries();
	write_c0_wired(tlbidx + 1);
	write_c0_index(tlbidx);
	mtc0_tlbw_hazard();
@@ -147,7 +147,7 @@ void kunmap_coherent(void)

	local_irq_save(flags);
	old_ctx = read_c0_entryhi();
	wired = read_c0_wired() - 1;
	wired = num_wired_entries() - 1;
	write_c0_wired(wired);
	write_c0_index(wired);
	write_c0_entryhi(UNIQUE_ENTRYHI(wired));
+3 −3
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ void local_flush_tlb_all(void)
	write_c0_entrylo0(0);
	write_c0_entrylo1(0);

	entry = read_c0_wired();
	entry = num_wired_entries();

	/*
	 * Blast 'em all away.
@@ -385,7 +385,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
	old_ctx = read_c0_entryhi();
	htw_stop();
	old_pagemask = read_c0_pagemask();
	wired = read_c0_wired();
	wired = num_wired_entries();
	write_c0_wired(wired + 1);
	write_c0_index(wired);
	tlbw_use_hazard();	/* What is the hazard here? */
@@ -449,7 +449,7 @@ __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
	htw_stop();
	old_ctx = read_c0_entryhi();
	old_pagemask = read_c0_pagemask();
	wired = read_c0_wired();
	wired = num_wired_entries();
	if (--temp_tlb_entry < wired) {
		printk(KERN_WARNING
		       "No TLB space left for add_temporary_entry\n");