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Commit feb589e9 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

Fixes for 4.1 for radeon all destined for stable:
- fix fallout from the audio rework
- VM fixes
- other assorted bug fixes

* 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: fix userptr return value checking (v2)
  drm/radeon: check new address before removing old one
  drm/radeon: reset BOs address after clearing it.
  drm/radeon: fix lockup when BOs aren't part of the VM on release
  drm/radeon: add SI DPM quirk for Sapphire R9 270 Dual-X 2G GDDR5
  drm/radeon: adjust pll when audio is not enabled
  drm/radeon: only enable audio streams if the monitor supports it
  drm/radeon: only mark audio as connected if the monitor supports it (v3)
  drm/radeon/audio: don't enable packets until the end
  drm/radeon: drop dce6_dp_enable
  drm/radeon: fix ordering of AVI packet setup
  drm/radeon: Use drm_calloc_ab for CS relocs
parents b787f68c 9fb2bcf9

drivers/gpu/drm/radeon/atombios_crtc.c

+3 −0
Original line number Diff line number Diff line
@@ -580,6 +580,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, 
		else

			radeon_crtc->pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;



		/* if there is no audio, set MINM_OVER_MAXP  */

		if (!drm_detect_monitor_audio(radeon_connector_edid(connector)))

			radeon_crtc->pll_flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP;

		if (rdev->family < CHIP_RV770)

			radeon_crtc->pll_flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP;

		/* use frac fb div on APUs */

drivers/gpu/drm/radeon/atombios_encoders.c

+2 −4
Original line number Diff line number Diff line
@@ -1761,17 +1761,15 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) 
	struct drm_device *dev = encoder->dev;

	struct radeon_device *rdev = dev->dev_private;

	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);

	int encoder_mode = atombios_get_encoder_mode(encoder);



	DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",

		  radeon_encoder->encoder_id, mode, radeon_encoder->devices,

		  radeon_encoder->active_device);



	if (connector && (radeon_audio != 0) &&

	if ((radeon_audio != 0) &&

	    ((encoder_mode == ATOM_ENCODER_MODE_HDMI) ||

	     (ENCODER_MODE_IS_DP(encoder_mode) &&

	      drm_detect_monitor_audio(radeon_connector_edid(connector)))))

	     ENCODER_MODE_IS_DP(encoder_mode)))

		radeon_audio_dpms(encoder, mode);



	switch (radeon_encoder->encoder_id) {

drivers/gpu/drm/radeon/dce6_afmt.c

+0 −25
Original line number Diff line number Diff line
@@ -295,28 +295,3 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev, 
		WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

	}

}
 


void dce6_dp_enable(struct drm_encoder *encoder, bool enable)

{

	struct drm_device *dev = encoder->dev;

	struct radeon_device *rdev = dev->dev_private;

	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;



	if (!dig || !dig->afmt)

		return;



	if (enable) {

		WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,

		       EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));

		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,

		       EVERGREEN_DP_SEC_ASP_ENABLE |		/* Audio packet transmission */

		       EVERGREEN_DP_SEC_ATP_ENABLE |		/* Audio timestamp packet transmission */

		       EVERGREEN_DP_SEC_AIP_ENABLE |		/* Audio infoframe packet transmission */

		       EVERGREEN_DP_SEC_STREAM_ENABLE);	/* Master enable for secondary stream engine */

	} else {

		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);

	}



	dig->afmt->enabled = enable;

}

drivers/gpu/drm/radeon/evergreen_hdmi.c

+34 −19
Original line number Diff line number Diff line
@@ -219,10 +219,6 @@ void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 
	WREG32(AFMT_AVI_INFO3 + offset,

		frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24));



	WREG32_OR(HDMI_INFOFRAME_CONTROL0 + offset,

		HDMI_AVI_INFO_SEND |	/* enable AVI info frames */

		HDMI_AVI_INFO_CONT);	/* required for audio info values to be updated */



	WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset,

		 HDMI_AVI_INFO_LINE(2),	/* anything other than 0 */

		 ~HDMI_AVI_INFO_LINE_MASK);
@@ -370,9 +366,13 @@ void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset) 
	WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset,

		AFMT_AUDIO_CHANNEL_ENABLE(0xff));



	WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,

	       HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */

	       HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */



	/* allow 60958 channel status and send audio packets fields to be updated */

	WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,

		AFMT_AUDIO_SAMPLE_SEND | AFMT_RESET_FIFO_WHEN_AUDIO_DIS | AFMT_60958_CS_UPDATE);

	WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset,

		  AFMT_RESET_FIFO_WHEN_AUDIO_DIS | AFMT_60958_CS_UPDATE);

}
@@ -398,17 +398,26 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable) 
		return;



	if (enable) {

		WREG32(HDMI_INFOFRAME_CONTROL1 + dig->afmt->offset,

		       HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */



		WREG32(HDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset,

		       HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */

		       HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */

		struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);



		if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {

			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

			       HDMI_AVI_INFO_SEND | /* enable AVI info frames */

			       HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */

			       HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */

			       HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */

			WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

				  AFMT_AUDIO_SAMPLE_SEND);

		} else {

			WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

			       HDMI_AVI_INFO_SEND | /* enable AVI info frames */

			       HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */

			WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

				   ~AFMT_AUDIO_SAMPLE_SEND);

		}

	} else {

		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

			   ~AFMT_AUDIO_SAMPLE_SEND);

		WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);

	}
@@ -424,20 +433,24 @@ void evergreen_dp_enable(struct drm_encoder *encoder, bool enable) 
	struct radeon_device *rdev = dev->dev_private;

	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;

	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);



	if (!dig || !dig->afmt)

		return;



	if (enable) {

	if (enable && drm_detect_monitor_audio(radeon_connector_edid(connector))) {

		struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);

		struct radeon_connector *radeon_connector = to_radeon_connector(connector);

		struct radeon_connector_atom_dig *dig_connector;

		uint32_t val;



		WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

			  AFMT_AUDIO_SAMPLE_SEND);



		WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,

		       EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));



		if (radeon_connector->con_priv) {

		if (!ASIC_IS_DCE6(rdev) && radeon_connector->con_priv) {

			dig_connector = radeon_connector->con_priv;

			val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);

			val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf);
@@ -457,6 +470,8 @@ void evergreen_dp_enable(struct drm_encoder *encoder, bool enable) 
			EVERGREEN_DP_SEC_STREAM_ENABLE);	/* Master enable for secondary stream engine */

	} else {

		WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);

		WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,

			   ~AFMT_AUDIO_SAMPLE_SEND);

	}



	dig->afmt->enabled = enable;

drivers/gpu/drm/radeon/r600_hdmi.c

+5 −4
Original line number Diff line number Diff line
@@ -228,12 +228,13 @@ void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 
	WREG32(HDMI0_AVI_INFO3 + offset,

		frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24));



	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,

		  HDMI0_AVI_INFO_LINE(2));	/* anything other than 0 */



	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,

		  HDMI0_AVI_INFO_SEND |	/* enable AVI info frames */

		  HDMI0_AVI_INFO_CONT);	/* send AVI info frames every frame/field */



	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,

		HDMI0_AVI_INFO_LINE(2));	/* anything other than 0 */

}



/*