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Commit fe808f3c authored by Hans Verkuil's avatar Hans Verkuil Committed by Mauro Carvalho Chehab
Browse files

[media] adv7842: set LLC DLL phase from platform_data 



The correct LLC DLL phase depends on the board layout, so this
should be part of the platform_data.

Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.

Tested-by: default avatarMartin Bugge <marbugge@cisco.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 834a8be1

arch/blackfin/mach-bf609/boards/ezkit.c

+1 −0
Original line number Diff line number Diff line
@@ -1027,6 +1027,7 @@ static struct adv7842_platform_data adv7842_data = { 
	.vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,

	.hdmi_free_run_enable = 1,

	.sdp_free_run_auto = 1,

	.llc_dll_phase = 0x10,

	.i2c_sdp_io = 0x40,

	.i2c_sdp = 0x41,

	.i2c_cp = 0x42,

drivers/media/i2c/adv7842.c

+1 −5
Original line number Diff line number Diff line
@@ -1593,9 +1593,6 @@ static void select_input(struct v4l2_subdev *sd, 
		afe_write(sd, 0x00, 0x00); /* power up ADC */

		afe_write(sd, 0xc8, 0x00); /* phase control */



		io_write(sd, 0x19, 0x83); /* LLC DLL phase */

		io_write(sd, 0x33, 0x40); /* LLC DLL enable */



		io_write(sd, 0xdd, 0x90); /* Manual 2x output clock */

		/* script says register 0xde, which don't exist in manual */
@@ -2609,8 +2606,7 @@ static int adv7842_core_init(struct v4l2_subdev *sd) 
	io_write_and_or(sd, 0x20, 0xcf, 0x00);



	/* LLC */

	/* Set phase to 16. TODO: get this from platform_data */

	io_write(sd, 0x19, 0x90);

	io_write(sd, 0x19, 0x80 | pdata->llc_dll_phase);

	io_write(sd, 0x33, 0x40);



	/* interrupts */

include/media/adv7842.h

+6 −0
Original line number Diff line number Diff line
@@ -192,6 +192,12 @@ struct adv7842_platform_data { 
		unsigned sync:2;

	} drive_strength;



	/*

	 * IO register 0x19: Adjustment to the LLC DLL phase in

	 * increments of 1/32 of a clock period.

	 */

	unsigned llc_dll_phase:5;



	/* External RAM for 3-D comb or frame synchronizer */

	unsigned sd_ram_size; /* ram size in MB */

	unsigned sd_ram_ddr:1; /* ddr or sdr sdram */