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Commit fd8c61eb authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

Lots of misc bug fixes for radeon and amdgpu and one for ttm.
- fix vram info fetching on Fiji and unposted boards
- additional vblank fixes from the conversion to drm_vblank_on/off
- UVD dGPU suspend and resume fixes
- lots of powerplay fixes
- fix a fence leak in the pageflip code
- ttm fix for platforms where CPU is 32 bit, but physical addresses are >32bits

* 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux: (21 commits)
  drm/amdgpu: total vram size also reduces pin size
  drm/amd/powerplay: add uvd/vce dpm enabling flag default.
  drm/amd/powerplay: fix issue that resume back, dpm can't work on FIJI.
  drm/amdgpu: save and restore the firwmware cache part when suspend resume
  drm/amdgpu: save and restore UVD context with suspend and resume
  drm/ttm: use phys_addr_t for ttm_bus_placement
  drm/radeon: Only call drm_vblank_on/off between drm_vblank_init/cleanup
  drm/amdgpu: fence wait old rcu slot
  drm/amdgpu: fix leaking fence in the pageflip code
  drm/amdgpu: print vram type rather than just DDR
  drm/amdgpu/gmc: use proper register for vram type on Fiji
  drm/amdgpu/gmc: move vram type fetching into sw_init
  drm/amdgpu: Set vblank_disable_allowed = true
  drm/radeon: Set vblank_disable_allowed = true
  drm/amd/powerplay: Need to change boot to performance state in resume.
  drm/amd/powerplay: add new Fiji function for not setting same ps.
  drm/amdgpu: check dpm state before pm system fs initialized.
  drm/amd/powerplay: notify amdgpu whether dpm is enabled or not.
  drm/amdgpu: Not support disable dpm in powerplay.
  drm/amdgpu: add an cgs interface to notify amdgpu the dpm state.
  ...
parents 30aab189 7c0ecda1

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1591,6 +1591,7 @@ struct amdgpu_uvd { 
	struct amdgpu_bo	*vcpu_bo;

	void			*cpu_addr;

	uint64_t		gpu_addr;

	void			*saved_bo;

	atomic_t		handles[AMDGPU_MAX_UVD_HANDLES];

	struct drm_file		*filp[AMDGPU_MAX_UVD_HANDLES];

	struct delayed_work	idle_work;

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+19 −5
Original line number Diff line number Diff line
@@ -816,10 +816,13 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 
	struct drm_device *ddev = adev->ddev;

	struct drm_crtc *crtc;

	uint32_t line_time_us, vblank_lines;

	struct cgs_mode_info *mode_info;



	if (info == NULL)

		return -EINVAL;



	mode_info = info->mode_info;



	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {

		list_for_each_entry(crtc,

				&ddev->mode_config.crtc_list, head) {
@@ -828,7 +831,7 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 
				info->active_display_mask |= (1 << amdgpu_crtc->crtc_id);

				info->display_count++;

			}

			if (info->mode_info != NULL &&

			if (mode_info != NULL &&

				crtc->enabled && amdgpu_crtc->enabled &&

				amdgpu_crtc->hw_mode.clock) {

				line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) /
@@ -836,10 +839,10 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 
				vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end -

							amdgpu_crtc->hw_mode.crtc_vdisplay +

							(amdgpu_crtc->v_border * 2);

				info->mode_info->vblank_time_us = vblank_lines * line_time_us;

				info->mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode);

				info->mode_info->ref_clock = adev->clock.spll.reference_freq;

				info->mode_info++;

				mode_info->vblank_time_us = vblank_lines * line_time_us;

				mode_info->refresh_rate = drm_mode_vrefresh(&amdgpu_crtc->hw_mode);

				mode_info->ref_clock = adev->clock.spll.reference_freq;

				mode_info = NULL;

			}

		}

	}
@@ -847,6 +850,16 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 
	return 0;

}





static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled)

{

	CGS_FUNC_ADEV;



	adev->pm.dpm_enabled = enabled;



	return 0;

}



/** \brief evaluate acpi namespace object, handle or pathname must be valid

 *  \param cgs_device

 *  \param info input/output arguments for the control method
@@ -1097,6 +1110,7 @@ static const struct cgs_ops amdgpu_cgs_ops = { 
	amdgpu_cgs_set_powergating_state,

	amdgpu_cgs_set_clockgating_state,

	amdgpu_cgs_get_active_displays_info,

	amdgpu_cgs_notify_dpm_enabled,

	amdgpu_cgs_call_acpi_method,

	amdgpu_cgs_query_system_info,

};

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ static bool amdgpu_flip_handle_fence(struct amdgpu_flip_work *work, 
	if (!fence_add_callback(fence, &work->cb, amdgpu_flip_callback))

		return true;



	fence_put(*f);

	fence_put(fence);

	return false;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c

+6 −2
Original line number Diff line number Diff line
@@ -121,7 +121,7 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **f) 
{

	struct amdgpu_device *adev = ring->adev;

	struct amdgpu_fence *fence;

	struct fence **ptr;

	struct fence *old, **ptr;

	uint32_t seq;



	fence = kmem_cache_alloc(amdgpu_fence_slab, GFP_KERNEL);
@@ -141,7 +141,11 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **f) 
	/* This function can't be called concurrently anyway, otherwise

	 * emitting the fence would mess up the hardware ring buffer.

	 */

	BUG_ON(rcu_dereference_protected(*ptr, 1));

	old = rcu_dereference_protected(*ptr, 1);

	if (old && !fence_is_signaled(old)) {

		DRM_INFO("rcu slot is busy\n");

		fence_wait(old, false);

	}



	rcu_assign_pointer(*ptr, fence_get(&fence->base));

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

+2 −0
Original line number Diff line number Diff line
@@ -219,6 +219,8 @@ int amdgpu_irq_init(struct amdgpu_device *adev) 
	if (r) {

		return r;

	}

	adev->ddev->vblank_disable_allowed = true;



	/* enable msi */

	adev->irq.msi_enabled = false;