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Commit fd4bda24 authored by mohamed sunfeer's avatar mohamed sunfeer Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add Qseecom node and Qseecom heap for sdx24 



Enable qseecom driver node on Device tree include file to
enable the qseecom driver to communicate with TZ. The qseecom
heap and qseecom_ta heap will be used by the qseecom userspace
library for allocating memory for loading trusted applications.

Change-Id: Ifa416500e76cd4506e239f365ae728653bc3a381
Signed-off-by: default avatarmohamed sunfeer <msunfeer@codeaurora.org>
parent e4fab30e

arch/arm/boot/dts/qcom/sdxpoorwills-ion.dtsi

+13 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -26,5 +26,17 @@ 
			memory-region = <&audio_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@27 { /* QSEECOM HEAP */

			reg = <27>;

			memory-region = <&qseecom_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@19 { /* QSEECOM TA HEAP */

			reg = <19>;

			memory-region = <&qseecom_ta_mem>;

			qcom,ion-heap-type = "DMA";

		};

	};

};

arch/arm/boot/dts/qcom/sdxpoorwills.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -79,6 +79,20 @@ 
			reusable;

			size = <0x400000>;

		};



		qseecom_mem: qseecom_region@0 {

			compatible = "shared-dma-pool";

			reusable;

			alignment = <0x400000>;

			size = <0x1400000>;

		};



		qseecom_ta_mem: qseecom_ta_region@0 {

			compatible = "shared-dma-pool";

			reusable;

			alignment = <0x400000>;

			size = <0x1000000>;

		};

	};



	cpus {
@@ -1141,6 +1155,33 @@ 
		clock-names = "iface_clk";

	};



	qcom_seecom: qseecom@90000000{

		compatible = "qcom,qseecom";

		reg = <0x90000000 0x600000>;

		reg-names = "secapp-region";

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,no-clock-support;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		clocks = <&clock_gcc GCC_CE1_CLK>,

			<&clock_gcc GCC_CE1_CLK>,

			<&clock_gcc GCC_CE1_AHB_CLK>,

			<&clock_gcc GCC_CE1_AXI_CLK>;

		qcom,msm-bus,vectors-KBps =

			<125 512 0 0>,

			<125 512 20000 40000>,

			<125 512 30000 80000>,

			<125 512 40000 100000>;

		clock-names = "core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		qcom,ce-opp-freq = <171430000>;

		qcom,qsee-reentrancy-support = <2>;

		status = "disabled";

	};



	qcom_cedev: qcedev@1de0000 {

		compatible = "qcom,qcedev";

		reg = <0x1de0000 0x20000>,