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Commit fd2d2fc2 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Inki Dae
Browse files

drm/exynos: introduce exynos_drm_plane_config structure 



This patch adds common structure for keeping plane configuration and
capabilities data. This patch is inspired by similar code developed by
Tobias Jakobi.

Changelog v2:
- fix vidi_win_types(i) call. vidi_win_types is not a function.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent ab144201

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

+13 −5
Original line number Diff line number Diff line
@@ -26,7 +26,6 @@ 
#include "exynos_drm_iommu.h"



#define WINDOWS_NR	3

#define CURSOR_WIN	2

#define MIN_FB_WIDTH_FOR_16WORD_BURST	128



static const char * const decon_clks_name[] = {
@@ -57,6 +56,7 @@ struct decon_context { 
	struct drm_device		*drm_dev;

	struct exynos_drm_crtc		*crtc;

	struct exynos_drm_plane		planes[WINDOWS_NR];

	struct exynos_drm_plane_config	configs[WINDOWS_NR];

	void __iomem			*addr;

	struct clk			*clks[ARRAY_SIZE(decon_clks_name)];

	int				pipe;
@@ -72,6 +72,12 @@ static const uint32_t decon_formats[] = { 
	DRM_FORMAT_ARGB8888,

};



static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {

	DRM_PLANE_TYPE_PRIMARY,

	DRM_PLANE_TYPE_OVERLAY,

	DRM_PLANE_TYPE_CURSOR,

};



static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,

				  u32 val)

{
@@ -482,7 +488,6 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
	struct exynos_drm_private *priv = drm_dev->dev_private;

	struct exynos_drm_plane *exynos_plane;

	enum exynos_drm_output_type out_type;

	enum drm_plane_type type;

	unsigned int win;

	int ret;
@@ -492,10 +497,13 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
	for (win = ctx->first_win; win < WINDOWS_NR; win++) {

		int tmp = (win == ctx->first_win) ? 0 : win;



		type = exynos_plane_get_type(tmp, CURSOR_WIN);

		ctx->configs[win].pixel_formats = decon_formats;

		ctx->configs[win].num_pixel_formats = ARRAY_SIZE(decon_formats);

		ctx->configs[win].zpos = win;

		ctx->configs[win].type = decon_win_types[tmp];



		ret = exynos_plane_init(drm_dev, &ctx->planes[win],

				1 << ctx->pipe, type, decon_formats,

				ARRAY_SIZE(decon_formats), win);

					1 << ctx->pipe, &ctx->configs[win]);

		if (ret)

			return ret;

	}

drivers/gpu/drm/exynos/exynos7_drm_decon.c

+15 −8
Original line number Diff line number Diff line
@@ -41,13 +41,13 @@ 
#define MIN_FB_WIDTH_FOR_16WORD_BURST 128



#define WINDOWS_NR	2

#define CURSOR_WIN	1



struct decon_context {

	struct device			*dev;

	struct drm_device		*drm_dev;

	struct exynos_drm_crtc		*crtc;

	struct exynos_drm_plane		planes[WINDOWS_NR];

	struct exynos_drm_plane_config	configs[WINDOWS_NR];

	struct clk			*pclk;

	struct clk			*aclk;

	struct clk			*eclk;
@@ -82,6 +82,11 @@ static const uint32_t decon_formats[] = { 
	DRM_FORMAT_BGRA8888,

};



static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {

	DRM_PLANE_TYPE_PRIMARY,

	DRM_PLANE_TYPE_CURSOR,

};



static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc)

{

	struct decon_context *ctx = crtc->ctx;
@@ -637,8 +642,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
	struct decon_context *ctx = dev_get_drvdata(dev);

	struct drm_device *drm_dev = data;

	struct exynos_drm_plane *exynos_plane;

	enum drm_plane_type type;

	unsigned int zpos;

	unsigned int i;

	int ret;



	ret = decon_ctx_initialize(ctx, drm_dev);
@@ -647,11 +651,14 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
		return ret;

	}



	for (zpos = 0; zpos < WINDOWS_NR; zpos++) {

		type = exynos_plane_get_type(zpos, CURSOR_WIN);

		ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],

					1 << ctx->pipe, type, decon_formats,

					ARRAY_SIZE(decon_formats), zpos);

	for (i = 0; i < WINDOWS_NR; i++) {

		ctx->configs[i].pixel_formats = decon_formats;

		ctx->configs[i].num_pixel_formats = ARRAY_SIZE(decon_formats);

		ctx->configs[i].zpos = i;

		ctx->configs[i].type = decon_win_types[i];



		ret = exynos_plane_init(drm_dev, &ctx->planes[i],

					1 << ctx->pipe, &ctx->configs[i]);

		if (ret)

			return ret;

	}

drivers/gpu/drm/exynos/exynos_drm_drv.h

+19 −0
Original line number Diff line number Diff line
@@ -84,10 +84,29 @@ to_exynos_plane_state(struct drm_plane_state *state) 


struct exynos_drm_plane {

	struct drm_plane base;

	const struct exynos_drm_plane_config *config;

	unsigned int zpos;

	struct drm_framebuffer *pending_fb;

};



/*

 * Exynos DRM plane configuration structure.

 *

 * @zpos: z-position of the plane.

 * @type: type of the plane (primary, cursor or overlay).

 * @pixel_formats: supported pixel formats.

 * @num_pixel_formats: number of elements in 'pixel_formats'.

 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)

 */



struct exynos_drm_plane_config {

	unsigned int zpos;

	enum drm_plane_type type;

	const uint32_t *pixel_formats;

	unsigned int num_pixel_formats;

	unsigned int capabilities;

};



/*

 * Exynos drm crtc ops

 *

drivers/gpu/drm/exynos/exynos_drm_fimd.c

+17 −8
Original line number Diff line number Diff line
@@ -88,7 +88,6 @@ 


/* FIMD has totally five hardware windows. */

#define WINDOWS_NR	5

#define CURSOR_WIN	4



struct fimd_driver_data {

	unsigned int timing_base;
@@ -151,6 +150,7 @@ struct fimd_context { 
	struct drm_device		*drm_dev;

	struct exynos_drm_crtc		*crtc;

	struct exynos_drm_plane		planes[WINDOWS_NR];

	struct exynos_drm_plane_config	configs[WINDOWS_NR];

	struct clk			*bus_clk;

	struct clk			*lcd_clk;

	void __iomem			*regs;
@@ -188,6 +188,14 @@ static const struct of_device_id fimd_driver_dt_match[] = { 
};

MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);



static const enum drm_plane_type fimd_win_types[WINDOWS_NR] = {

	DRM_PLANE_TYPE_PRIMARY,

	DRM_PLANE_TYPE_OVERLAY,

	DRM_PLANE_TYPE_OVERLAY,

	DRM_PLANE_TYPE_OVERLAY,

	DRM_PLANE_TYPE_CURSOR,

};



static const uint32_t fimd_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_XRGB1555,
@@ -927,18 +935,19 @@ static int fimd_bind(struct device *dev, struct device *master, void *data) 
	struct drm_device *drm_dev = data;

	struct exynos_drm_private *priv = drm_dev->dev_private;

	struct exynos_drm_plane *exynos_plane;

	enum drm_plane_type type;

	unsigned int zpos;

	unsigned int i;

	int ret;



	ctx->drm_dev = drm_dev;

	ctx->pipe = priv->pipe++;



	for (zpos = 0; zpos < WINDOWS_NR; zpos++) {

		type = exynos_plane_get_type(zpos, CURSOR_WIN);

		ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],

					1 << ctx->pipe, type, fimd_formats,

					ARRAY_SIZE(fimd_formats), zpos);

	for (i = 0; i < WINDOWS_NR; i++) {

		ctx->configs[i].pixel_formats = fimd_formats;

		ctx->configs[i].num_pixel_formats = ARRAY_SIZE(fimd_formats);

		ctx->configs[i].zpos = i;

		ctx->configs[i].type = fimd_win_types[i];

		ret = exynos_plane_init(drm_dev, &ctx->planes[i],

					1 << ctx->pipe, &ctx->configs[i]);

		if (ret)

			return ret;

	}

drivers/gpu/drm/exynos/exynos_drm_plane.c

+14 −20
Original line number Diff line number Diff line
@@ -246,28 +246,20 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane, 
	drm_object_attach_property(&plane->base, prop, zpos);

}



enum drm_plane_type exynos_plane_get_type(unsigned int zpos,

					  unsigned int cursor_win)

{

		if (zpos == DEFAULT_WIN)

			return DRM_PLANE_TYPE_PRIMARY;

		else if (zpos == cursor_win)

			return DRM_PLANE_TYPE_CURSOR;

		else

			return DRM_PLANE_TYPE_OVERLAY;

}



int exynos_plane_init(struct drm_device *dev,

		      struct exynos_drm_plane *exynos_plane,

		      unsigned long possible_crtcs, enum drm_plane_type type,

		      const uint32_t *formats, unsigned int fcount,

		      unsigned int zpos)

		      unsigned long possible_crtcs,

		      const struct exynos_drm_plane_config *config)

{

	int err;



	err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs,

				       &exynos_plane_funcs, formats, fcount,

				       type);

	err = drm_universal_plane_init(dev, &exynos_plane->base,

				       possible_crtcs,

				       &exynos_plane_funcs,

				       config->pixel_formats,

				       config->num_pixel_formats,

				       config->type);



	if (err) {

		DRM_ERROR("failed to initialize plane\n");

		return err;
@@ -275,10 +267,12 @@ int exynos_plane_init(struct drm_device *dev, 


	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);



	exynos_plane->zpos = zpos;

	exynos_plane->zpos = config->zpos;

	exynos_plane->config = config;



	if (type == DRM_PLANE_TYPE_OVERLAY)

		exynos_plane_attach_zpos_property(&exynos_plane->base, zpos);

	if (config->type == DRM_PLANE_TYPE_OVERLAY)

		exynos_plane_attach_zpos_property(&exynos_plane->base,

						  config->zpos);



	return 0;

}