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Commit fcfa0604 authored by Neil Turton's avatar Neil Turton Committed by Ben Hutchings
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sfc: Use rmb() to ensure reads occur in order 

Enabling write-combining may also enable read reordering.  The BIU is
only guaranteed to read from a 128-bit CSR or 64-bit SRAM word when
the host reads from its lowest address; otherwise the BIU may use the
latched value.  Therefore we need to reinstate the read memory
barriers after the first read operation for each CSR or SRAM word.

Signed-off-by; Ben Hutchings <bhutchings@solarflare.com>
parent d4fabcc8

drivers/net/sfc/io.h

+2 −0
Original line number Diff line number Diff line
@@ -152,6 +152,7 @@ static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value, 


	spin_lock_irqsave(&efx->biu_lock, flags);

	value->u32[0] = _efx_readd(efx, reg + 0);

	rmb();

	value->u32[1] = _efx_readd(efx, reg + 4);

	value->u32[2] = _efx_readd(efx, reg + 8);

	value->u32[3] = _efx_readd(efx, reg + 12);
@@ -174,6 +175,7 @@ static inline void efx_sram_readq(struct efx_nic *efx, void __iomem *membase, 
	value->u64[0] = (__force __le64)__raw_readq(membase + addr);

#else

	value->u32[0] = (__force __le32)__raw_readl(membase + addr);

	rmb();

	value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4);

#endif

	spin_unlock_irqrestore(&efx->biu_lock, flags);