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Commit fbb11f03 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm: update sde rsc mode-2 entry/exit sequence 



The sde rsc mode-2 entry/exit sequence needs update
for clk and vid state. A primary display (command mode
panel) may not be active when rsc is in clk state and
may not be configured to generate the vsync. It needs
different sequence because display is not active
and vsync is not configured.

Change-Id: If682f8f48bb337eccbcc5e6af1faf59bbc7cc8cb
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 79d42bd7

drivers/gpu/drm/msm/sde_rsc.c

+3 −13
Original line number Diff line number Diff line
@@ -413,12 +413,6 @@ static int sde_rsc_switch_to_cmd(struct sde_rsc_priv *rsc, 
		if (client->current_state == SDE_RSC_VID_STATE)

			goto end;



	/* no need to enable solver again */

	if (rsc->current_state == SDE_RSC_CLK_STATE) {

		rc = 0;

		goto end;

	}



	if (rsc->hw_ops.state_update)

		rc = rsc->hw_ops.state_update(rsc, SDE_RSC_CMD_STATE);
@@ -440,14 +434,8 @@ static bool sde_rsc_switch_to_clk(struct sde_rsc_priv *rsc) 
		    (client->current_state == SDE_RSC_CMD_STATE))

			goto end;



	/* no need to enable the solver again */

	if (rsc->current_state == SDE_RSC_CMD_STATE) {

		rc = 0;

		goto end;

	}



	if (rsc->hw_ops.state_update)

		rc = rsc->hw_ops.state_update(rsc, SDE_RSC_CMD_STATE);

		rc = rsc->hw_ops.state_update(rsc, SDE_RSC_CLK_STATE);

end:

	return rc;

}
@@ -1086,6 +1074,7 @@ static int sde_rsc_probe(struct platform_device *pdev) 
	sde_rsc_clk_enable(&rsc->phandle, rsc->pclient, false);



	INIT_LIST_HEAD(&rsc->client_list);

	INIT_LIST_HEAD(&rsc->event_list);

	mutex_init(&rsc->client_lock);



	pr_info("sde rsc index:%d probed successfully\n",
@@ -1095,6 +1084,7 @@ static int sde_rsc_probe(struct platform_device *pdev) 
	snprintf(name, MAX_RSC_CLIENT_NAME_LEN, "%s%d", "sde_rsc", counter);

	_sde_rsc_init_debugfs(rsc, name);

	counter++;

	rsc->power_collapse = true;



	ret = component_add(&pdev->dev, &sde_rsc_comp_ops);

	if (ret)

drivers/gpu/drm/msm/sde_rsc_hw.c

+40 −5
Original line number Diff line number Diff line
@@ -314,6 +314,20 @@ int sde_rsc_mode2_entry(struct sde_rsc_priv *rsc) 
	wrapper_status |= BIT(0);

	dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,

					wrapper_status, rsc->debug_mode);



	/**

	 * force busy and idle during clk & video mode state because it

	 * is trying to entry in mode-2 without turning on the vysnc.

	 */

	if ((rsc->current_state == SDE_RSC_VID_STATE) ||

			(rsc->current_state == SDE_RSC_CLK_STATE)) {

		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,

				BIT(0) | BIT(1), rsc->debug_mode);

		wmb(); /* force busy gurantee */

		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,

				BIT(0) | BIT(9), rsc->debug_mode);

	}



	/* make sure that mode-2 is triggered before wait*/

	wmb();
@@ -331,6 +345,13 @@ int sde_rsc_mode2_entry(struct sde_rsc_priv *rsc) 
		goto end;

	}



	if ((rsc->current_state == SDE_RSC_VID_STATE) ||

			(rsc->current_state == SDE_RSC_CLK_STATE)) {

		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,

					BIT(0) | BIT(8), rsc->debug_mode);

		wmb(); /* force busy on vsync */

	}



	rsc_event_trigger(rsc, SDE_RSC_EVENT_POST_CORE_PC);



	return 0;
@@ -343,13 +364,26 @@ int sde_rsc_mode2_entry(struct sde_rsc_priv *rsc) 
	return rc;

}



int sde_rsc_mode2_exit(struct sde_rsc_priv *rsc)

int sde_rsc_mode2_exit(struct sde_rsc_priv *rsc, enum sde_rsc_state state)

{

	int rc = -EBUSY;

	int count, reg;



	rsc_event_trigger(rsc, SDE_RSC_EVENT_PRE_CORE_RESTORE);



	/**

	 * force busy and idle during clk & video mode state because it

	 * is trying to entry in mode-2 without turning on the vysnc.

	 */

	if ((state == SDE_RSC_VID_STATE) || (state == SDE_RSC_CLK_STATE)) {

		reg = dss_reg_r(&rsc->wrapper_io,

			SDE_RSCC_WRAPPER_OVERRIDE_CTRL, rsc->debug_mode);

		reg |= BIT(8);

		reg &= ~(BIT(1) | BIT(0));

		dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_OVERRIDE_CTRL,

							reg, rsc->debug_mode);

	}



	// needs review with HPG sequence

	dss_reg_w(&rsc->wrapper_io, SDE_RSCC_F1_QTMR_V1_CNTP_CVAL_LO,

					0x0, rsc->debug_mode);
@@ -405,7 +439,7 @@ static int sde_rsc_state_update(struct sde_rsc_priv *rsc, 
	int reg;



	if (rsc->power_collapse) {

		rc = sde_rsc_mode2_exit(rsc);

		rc = sde_rsc_mode2_exit(rsc, state);

		if (rc)

			pr_err("power collapse: mode2 exit failed\n");

		else
@@ -451,6 +485,10 @@ static int sde_rsc_state_update(struct sde_rsc_priv *rsc, 
		rsc_event_trigger(rsc, SDE_RSC_EVENT_SOLVER_DISABLED);

		break;



	case SDE_RSC_CLK_STATE:

		pr_debug("clk state handling\n");

		break;



	case SDE_RSC_IDLE_STATE:

		rc = sde_rsc_mode2_entry(rsc);

		if (rc)
@@ -694,9 +732,6 @@ int sde_rsc_hw_register(struct sde_rsc_priv *rsc) 
	rsc->hw_ops.tcs_use_ok = rsc_hw_tcs_use_ok;

	rsc->hw_ops.is_amc_mode = rsc_hw_is_amc_mode;



	rsc->hw_ops.mode2_entry = sde_rsc_mode2_entry;

	rsc->hw_ops.mode2_exit = sde_rsc_mode2_exit;



	rsc->hw_ops.hw_vsync = rsc_hw_vsync;

	rsc->hw_ops.state_update = sde_rsc_state_update;

	rsc->hw_ops.debug_show = sde_rsc_debug_show;

drivers/gpu/drm/msm/sde_rsc_priv.h

+0 −6
Original line number Diff line number Diff line
@@ -61,10 +61,6 @@ enum rsc_vsync_req { 
 *				TCS command.

 * @hw_vsync:			Enables the vsync on RSC block.

 * @tcs_use_ok:			set TCS set to high to allow RSC to use it.

 * @mode2_entry:		Request to entry mode2 when all clients are

 *                              requesting power collapse.

 * @mode2_exit:			Request to exit mode2 when one of the client

 *                              is requesting against the power collapse

 * @is_amc_mode:		Check current amc mode status

 * @state_update:		Enable/override the solver based on rsc state

 *                              status (command/video)
@@ -78,8 +74,6 @@ struct sde_rsc_hw_ops { 
	int (*hw_vsync)(struct sde_rsc_priv *rsc, enum rsc_vsync_req request,

		char *buffer, int buffer_size, u32 mode);

	int (*tcs_use_ok)(struct sde_rsc_priv *rsc);

	int (*mode2_entry)(struct sde_rsc_priv *rsc);

	int (*mode2_exit)(struct sde_rsc_priv *rsc);

	bool (*is_amc_mode)(struct sde_rsc_priv *rsc);

	int (*state_update)(struct sde_rsc_priv *rsc, enum sde_rsc_state state);

	int (*debug_show)(struct seq_file *s, struct sde_rsc_priv *rsc);