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Commit f990238f authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner
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arm64: dts: rockchip: Add main thermal info to rk3368.dtsi 



This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Acked-by: default avatarEduardo Valentin <edubezval@gmail.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c68bb56e

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ 
#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include <dt-bindings/thermal/thermal.h>



/ {

	compatible = "rockchip,rk3368";
@@ -124,6 +125,8 @@ 
			reg = <0x0 0x0>;

			cpu-idle-states = <&cpu_sleep>;

			enable-method = "psci";



			#cooling-cells = <2>; /* min followed by max */

		};



		cpu_l1: cpu@1 {
@@ -156,6 +159,8 @@ 
			reg = <0x0 0x100>;

			cpu-idle-states = <&cpu_sleep>;

			enable-method = "psci";



			#cooling-cells = <2>; /* min followed by max */

		};



		cpu_b1: cpu@101 {
@@ -405,6 +410,27 @@ 
		status = "disabled";

	};



	thermal-zones {

		#include "rk3368-thermal.dtsi"

	};



	tsadc: tsadc@ff280000 {

		compatible = "rockchip,rk3368-tsadc";

		reg = <0x0 0xff280000 0x0 0x100>;

		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

		clock-names = "tsadc", "apb_pclk";

		resets = <&cru SRST_TSADC>;

		reset-names = "tsadc-apb";

		pinctrl-names = "init", "default", "sleep";

		pinctrl-0 = <&otp_gpio>;

		pinctrl-1 = <&otp_out>;

		pinctrl-2 = <&otp_gpio>;

		#thermal-sensor-cells = <1>;

		rockchip,hw-tshut-temp = <95000>;

		status = "disabled";

	};



	gmac: ethernet@ff290000 {

		compatible = "rockchip,rk3368-gmac";

		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -830,6 +856,16 @@ 
			};

		};



		tsadc {

			otp_gpio: otp-gpio {

				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;

			};



			otp_out: otp-out {

				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		uart0 {

			uart0_xfer: uart0-xfer {

				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,