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Commit f92a9162 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Add functions to emit register offsets to the ring 



When register type safety happens, we can't just try to emit the
register itself to the ring. Instead we'll need to extract the
offset from it first. Add some convenience functions that will do
that.

v2: Convert MOCS setup too

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446672017-24497-20-git-send-email-ville.syrjala@linux.intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent e597ef40

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -4591,7 +4591,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice) 
	 */

	for (i = 0; i < GEN7_L3LOG_SIZE / 4; i++) {

		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

		intel_ring_emit(ring, GEN7_L3LOG(slice, i));

		intel_ring_emit_reg(ring, GEN7_L3LOG(slice, i));

		intel_ring_emit(ring, remap_info[i]);

	}

drivers/gpu/drm/i915/i915_gem_context.c

+2 −2
Original line number Diff line number Diff line
@@ -556,7 +556,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) 
				if (signaller == ring)

					continue;



				intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));

				intel_ring_emit_reg(ring, RING_PSMI_CTL(signaller->mmio_base));

				intel_ring_emit(ring, _MASKED_BIT_ENABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));

			}

		}
@@ -581,7 +581,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) 
				if (signaller == ring)

					continue;



				intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));

				intel_ring_emit_reg(ring, RING_PSMI_CTL(signaller->mmio_base));

				intel_ring_emit(ring, _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));

			}

		}

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+2 −2
Original line number Diff line number Diff line
@@ -1114,7 +1114,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, 


	for (i = 0; i < 4; i++) {

		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

		intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));

		intel_ring_emit_reg(ring, GEN7_SO_WRITE_OFFSET(i));

		intel_ring_emit(ring, 0);

	}
@@ -1241,7 +1241,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params, 


		intel_ring_emit(ring, MI_NOOP);

		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

		intel_ring_emit(ring, INSTPM);

		intel_ring_emit_reg(ring, INSTPM);

		intel_ring_emit(ring, instp_mask << 16 | instp_mode);

		intel_ring_advance(ring);

drivers/gpu/drm/i915/i915_gem_gtt.c

+6 −6
Original line number Diff line number Diff line
@@ -667,10 +667,10 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, 
		return ret;



	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

	intel_ring_emit(ring, GEN8_RING_PDP_UDW(ring, entry));

	intel_ring_emit_reg(ring, GEN8_RING_PDP_UDW(ring, entry));

	intel_ring_emit(ring, upper_32_bits(addr));

	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

	intel_ring_emit(ring, GEN8_RING_PDP_LDW(ring, entry));

	intel_ring_emit_reg(ring, GEN8_RING_PDP_LDW(ring, entry));

	intel_ring_emit(ring, lower_32_bits(addr));

	intel_ring_advance(ring);
@@ -1668,9 +1668,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt, 
		return ret;



	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2));

	intel_ring_emit(ring, RING_PP_DIR_DCLV(ring));

	intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(ring));

	intel_ring_emit(ring, PP_DIR_DCLV_2G);

	intel_ring_emit(ring, RING_PP_DIR_BASE(ring));

	intel_ring_emit_reg(ring, RING_PP_DIR_BASE(ring));

	intel_ring_emit(ring, get_pd_offset(ppgtt));

	intel_ring_emit(ring, MI_NOOP);

	intel_ring_advance(ring);
@@ -1705,9 +1705,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, 
		return ret;



	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(2));

	intel_ring_emit(ring, RING_PP_DIR_DCLV(ring));

	intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(ring));

	intel_ring_emit(ring, PP_DIR_DCLV_2G);

	intel_ring_emit(ring, RING_PP_DIR_BASE(ring));

	intel_ring_emit_reg(ring, RING_PP_DIR_BASE(ring));

	intel_ring_emit(ring, get_pd_offset(ppgtt));

	intel_ring_emit(ring, MI_NOOP);

	intel_ring_advance(ring);

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -11110,7 +11110,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, 
	 */

	if (ring->id == RCS) {

		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));

		intel_ring_emit(ring, DERRMR);

		intel_ring_emit_reg(ring, DERRMR);

		intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |

					DERRMR_PIPEB_PRI_FLIP_DONE |

					DERRMR_PIPEC_PRI_FLIP_DONE));
@@ -11120,7 +11120,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, 
		else

			intel_ring_emit(ring, MI_STORE_REGISTER_MEM |

					      MI_SRM_LRM_GLOBAL_GTT);

		intel_ring_emit(ring, DERRMR);

		intel_ring_emit_reg(ring, DERRMR);

		intel_ring_emit(ring, ring->scratch.gtt_offset + 256);

		if (IS_GEN8(dev)) {

			intel_ring_emit(ring, 0);