Commit f9162054 authored Jun 28, 2020 by Hans de Goede Committed by Greg Kroah-Hartman Jul 31, 2020

ASoC: rt5670: Correct RT5670_LDO_SEL_MASK



commit 5cacc6f5764e94fa753b2c1f5f7f1f3f74286e82 upstream.

The RT5670_PWR_ANLG1 register has 3 bits to select the LDO voltage,
so the correct mask is 0x7 not 0x3.

Because of this wrong mask we were programming the ldo bits
to a setting of binary 001 (0x05 & 0x03) instead of binary 101
when moving to SND_SOC_BIAS_PREPARE.

According to the datasheet 001 is a reserved value, so no idea
what it did, since the driver was working fine before I guess we
got lucky and it does something which is ok.

Fixes: 5e8351de ("ASoC: add RT5670 CODEC driver")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200628155231.71089-3-hdegoede@redhat.com


Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 4881d9b6

sound/soc/codecs/rt5670.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -760,7 +760,7 @@
		#define RT5670_PWR_VREF2_BIT 4
		#define RT5670_PWR_FV2 (0x1 << 3)
		#define RT5670_PWR_FV2_BIT 3
		#define RT5670_LDO_SEL_MASK (0x3)
		#define RT5670_LDO_SEL_MASK (0x7)
		#define RT5670_LDO_SEL_SFT 0

		/* Power Management for Analog 2 (0x64) */