dwc3: core: clear DELAYP1TRANS with USB3PIPECTL register

Commit fd115e68971b ("dwc3: core: Don't perform controller and PHYs
soft reset") removed clearing DELAYP1TRANS. It is recommended to clear
DELAYP1TRANS bit with USB3PIPECTL register which controls USB
controller allowing USB QMP PHY low power transitions.

Change-Id: I54ba694f4c997bf5ecc540cee274e2cb07b77446
Signed-off-by: Mayank Rana <mrana@codeaurora.org>