Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f7ea1052 authored by Rob Herring's avatar Rob Herring Committed by David S. Miller
Browse files

net: calxedaxgmac: enable interrupts after napi_enable



Fix a race condition where the interrupt handler may have called
napi_schedule before napi_enable is called. This would disable interrupts
and never actually schedule napi to run.

Reported-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cbe157b6
Loading
Loading
Loading
Loading
+5 −3
Original line number Diff line number Diff line
@@ -959,9 +959,7 @@ static int xgmac_hw_init(struct net_device *dev)
		DMA_BUS_MODE_FB | DMA_BUS_MODE_ATDS | DMA_BUS_MODE_AAL;
	writel(value, ioaddr + XGMAC_DMA_BUS_MODE);

	/* Enable interrupts */
	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);
	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);
	writel(0, ioaddr + XGMAC_DMA_INTR_ENA);

	/* Mask power mgt interrupt */
	writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT);
@@ -1029,6 +1027,10 @@ static int xgmac_open(struct net_device *dev)
	napi_enable(&priv->napi);
	netif_start_queue(dev);

	/* Enable interrupts */
	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);
	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);

	return 0;
}