Merge "DOWNSTREAM: Merge commit '40859329'...

		- System Trace Macrocell:

			"arm,coresight-stm", "arm,primecell"; [1]

		- Trigger Generation Unit:

			 "arm,primecell";

	* reg: physical base address and length of the register

	  set(s) of the component.

	* qcom,dummy-sink: Configure the device as sink.

* Additional required property for coresight-tgu devices:

	* tgu-steps: must be present. Indicates number of steps supported

	  by the TGU.

	* tgu-conditions: must be present. Indicates the number of conditions

	  supported by the TGU.

	* tgu-regs: must be present. Indicates the number of regs supported

	  by the TGU.

	* tgu-timer-counters: must be present. Indicates the number of timers and

	  counters available in the TGU to do a comparision.

* Optional properties for all components:

	* reg-names: names corresponding to each reg property value.

		};

	};

4. CTIs

5. CTIs

	cti0: cti@6010000 {

		compatible = "arm,coresight-cti", "arm,primecell";

		reg = <0x6010000 0x1000>;

		clock-names = "apb_pclk";

	};

6. TGUs

	ipcb_tgu: tgu@6b0c000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b999>;

		reg = <0x06B0C000 0x1000>;

		reg-names = "tgu-base";

		tgu-steps = <3>;

		tgu-conditions = <4>;

		tgu-regs = <4>;

		tgu-timer-counters = <8>;

		coresight-name = "coresight-tgu-ipcb";

		clocks = <&clock_aop QDSS_CLK>;

		clock-names = "apb_pclk";

	};

[1]. There is currently two version of STM: STM32 and STM500.  Both

have the same HW interface and as such don't need an explicit binding name.

- SDM670

  compatible = "qcom,sdm670"

- QCS605

  compatible = "qcom,qcs605"

- SDA670

  compatible = "qcom,sda670"

- MSM8952

  compatible = "qcom,msm8952"

compatible = "qcom,sdm670-rumi"

compatible = "qcom,sdm670-cdp"

compatible = "qcom,sdm670-mtp"

compatible = "qcom,qcs605-cdp"

compatible = "qcom,qcs605-mtp"

compatible = "qcom,sda670-cdp"

compatible = "qcom,sda670-mtp"

compatible = "qcom,msm8952-rumi"

compatible = "qcom,msm8952-sim"

compatible = "qcom,msm8952-qrd"

				power collapse feature available or not.

- qcom,sde-has-mixer-gc:	Boolean property to indicate if mixer has gamma correction

				feature available or not.

- qcom,sde-has-dest-scaler: 	Boolean property to indicate if destination scaler

				feature is available or not.

- qcom,sde-max-dest-scaler-input-linewidth: A u32 value indicates the

				maximum input line width to destination scaler.

- qcom,sde-max-dest-scaler-output-linewidth: A u32 value indicates the

				maximum output line width of destination scaler.

- qcom,sde-dest-scaler-top-off: A u32 value provides the

				offset from mdp base to destination scaler block.

- qcom,sde-dest-scaler-top-size: A u32 value indicates the address range for ds top

- qcom,sde-dest-scaler-off: 	Array of u32 offsets indicate the qseed3 scaler blocks

				offset from destination scaler top offset.

- qcom,sde-dest-scaler-size:    A u32 value indicates the address range for each scaler block

- qcom,sde-sspp-clk-ctrl:	Array of offsets describing clk control

				offsets for dynamic clock gating. 1st value

				in the array represents offset of the control

				control register. Number of offsets defined should

				match the number of xin-ids defined in

				property: qcom,sde-inline-rot-xin

- #power-domain-cells:		Number of cells in a power-domain specifier and should contain 0.

Bus Scaling Subnodes:

- qcom,sde-reg-bus:		Property to provide Bus scaling for register access for

    interrupt-controller;

    #interrupt-cells = <1>;

    iommus = <&mdp_smmu 0>;

    #power-domain-cells = <0>;

    qcom,sde-off = <0x1000>;

    qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400

    qcom,sde-dspp-off = <0x00055000 0x00057000>;

    qcom,sde-dspp-ad-off = <0x24000 0x22800>;

    qcom,sde-dspp-ad-version = <0x00030000>;

    qcom,sde-dest-scaler-top-off = <0x00061000>;

    qcom,sde-dest-scaler-off = <0x800 0x1000>;

    qcom,sde-wb-off = <0x00066000>;

    qcom,sde-wb-xin-id = <6>;

    qcom,sde-intf-off = <0x0006b000 0x0006b800

    qcom,sde-cdm-size = <0x100>;

    qcom,sde-pp-size = <0x100>;

    qcom,sde-wb-size = <0x100>;

    qcom,sde-dest-scaler-top-size = <0xc>;

    qcom,sde-dest-scaler-size = <0x800>;

    qcom,sde-len = <0x100>;

    qcom,sde-wb-linewidth = <2560>;

    qcom,sde-sspp-scale-size = <0x100>;

    qcom,sde-highest-bank-bit = <15>;

    qcom,sde-has-mixer-gc;

    qcom,sde-has-idle-pc;

    qcom,sde-has-dest-scaler;

    qcom,sde-max-dest-scaler-input-linewidth = <2048>;

    qcom,sde-max-dest-scaler-output-linewidth = <2560>;

    qcom,sde-sspp-max-rects = <1 1 1 1

				1 1 1 1

				1 1

		  Some hardware may not have full support for atos debugging

		  in tandem with other features like power collapse.

- qcom,mmu500-errata-1:

		  An array of <sid mask>.

		  Indicates the SIDs for which the workaround is required.

- qcom,deferred-regulator-disable-delay : The time delay for deferred regulator

                  disable in ms. In case of unmap call, regulator is

                  enabled/disabled. This may introduce additional delay. For

				swizzle configuration value.

- qcom,rot-reg-bus:		Property to provide Bus scaling for register

				access for rotator blocks.

- power-domains:		A phandle to respective power domain node.

Subnode properties:

- compatible:		Compatible name used in smmu v2.

		interrupt-parent = <&mdss_mdp>;

		interrupts = <2 0>;

		power-domains = <&mdss_mdp>;

		qcom,mdss-mdp-reg-offset = <0x00001000>;

		rot-vdd-supply = <&gdsc_mdss>;