Loading drivers/gpu/drm/msm/sde/sde_encoder.c +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -3739,6 +3739,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, SDE_ATRACE_BEGIN("enc_prepare_for_kickoff"); for (i = 0; i < sde_enc->num_phys_encs; i++) { phys = sde_enc->phys_encs[i]; params->is_primary = sde_enc->disp_info.is_primary; if (phys) { if (phys->ops.prepare_for_kickoff) { rc = phys->ops.prepare_for_kickoff( Loading drivers/gpu/drm/msm/sde/sde_encoder.h +3 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -54,11 +54,13 @@ struct sde_encoder_hw_resources { /** * sde_encoder_kickoff_params - info encoder requires at kickoff * @inline_rotate_prefill: number of lines to prefill for inline rotation * @is_primary: set to true if the display is primary display * @affected_displays: bitmask, bit set means the ROI of the commit lies within * the bounds of the physical display at the bit index */ struct sde_encoder_kickoff_params { u32 inline_rotate_prefill; u32 is_primary; unsigned long affected_displays; }; Loading drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c +6 −3 Original line number Diff line number Diff line Loading @@ -245,9 +245,10 @@ static void programmable_fetch_config(struct sde_encoder_phys *phys_enc, * HW layer requires VSYNC counter of first pixel of tgt VFP line. * @phys_enc: Pointer to physical encoder * @rot_fetch_lines: number of line to prefill, or 0 to disable * @is_primary: set true if the display is primary display */ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, u32 rot_fetch_lines) u32 rot_fetch_lines, u32 is_primary) { struct sde_encoder_phys_vid *vid_enc = to_sde_encoder_phys_vid(phys_enc); Loading @@ -264,7 +265,8 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, !phys_enc->hw_ctl->ops.get_bitmask_intf || !phys_enc->hw_ctl->ops.update_pending_flush || !vid_enc->hw_intf->ops.setup_rot_start || !phys_enc->sde_kms) !phys_enc->sde_kms || !is_primary) return; timing = &vid_enc->timing_params; Loading Loading @@ -873,7 +875,8 @@ static int sde_encoder_phys_vid_prepare_for_kickoff( vid_enc->error_count = 0; } programmable_rot_fetch_config(phys_enc, params->inline_rotate_prefill); programmable_rot_fetch_config(phys_enc, params->inline_rotate_prefill, params->is_primary); return rc; } Loading Loading
drivers/gpu/drm/msm/sde/sde_encoder.c +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -3739,6 +3739,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, SDE_ATRACE_BEGIN("enc_prepare_for_kickoff"); for (i = 0; i < sde_enc->num_phys_encs; i++) { phys = sde_enc->phys_encs[i]; params->is_primary = sde_enc->disp_info.is_primary; if (phys) { if (phys->ops.prepare_for_kickoff) { rc = phys->ops.prepare_for_kickoff( Loading
drivers/gpu/drm/msm/sde/sde_encoder.h +3 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -54,11 +54,13 @@ struct sde_encoder_hw_resources { /** * sde_encoder_kickoff_params - info encoder requires at kickoff * @inline_rotate_prefill: number of lines to prefill for inline rotation * @is_primary: set to true if the display is primary display * @affected_displays: bitmask, bit set means the ROI of the commit lies within * the bounds of the physical display at the bit index */ struct sde_encoder_kickoff_params { u32 inline_rotate_prefill; u32 is_primary; unsigned long affected_displays; }; Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c +6 −3 Original line number Diff line number Diff line Loading @@ -245,9 +245,10 @@ static void programmable_fetch_config(struct sde_encoder_phys *phys_enc, * HW layer requires VSYNC counter of first pixel of tgt VFP line. * @phys_enc: Pointer to physical encoder * @rot_fetch_lines: number of line to prefill, or 0 to disable * @is_primary: set true if the display is primary display */ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, u32 rot_fetch_lines) u32 rot_fetch_lines, u32 is_primary) { struct sde_encoder_phys_vid *vid_enc = to_sde_encoder_phys_vid(phys_enc); Loading @@ -264,7 +265,8 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, !phys_enc->hw_ctl->ops.get_bitmask_intf || !phys_enc->hw_ctl->ops.update_pending_flush || !vid_enc->hw_intf->ops.setup_rot_start || !phys_enc->sde_kms) !phys_enc->sde_kms || !is_primary) return; timing = &vid_enc->timing_params; Loading Loading @@ -873,7 +875,8 @@ static int sde_encoder_phys_vid_prepare_for_kickoff( vid_enc->error_count = 0; } programmable_rot_fetch_config(phys_enc, params->inline_rotate_prefill); programmable_rot_fetch_config(phys_enc, params->inline_rotate_prefill, params->is_primary); return rc; } Loading