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Commit f6115f2d authored by Deepak Kumar's avatar Deepak Kumar
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ARM: dts: msm: Add qcom,ca-target-pwrlevel for each speed bin on SDM670



Some platforms support multiple GPU clock plans based on the speed bin
in the efuse. Specify context aware DCVS target power level for each
speed bin to make sure context aware jump happens at correct level for
each GPU clock plan.

Change-Id: I245b2ca8adb75eccc03cc04da2b3792b12308d57
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent 65ca63e7
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