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Commit f5999327 authored by Harry Yang's avatar Harry Yang
Browse files

ARM: dts: msm: support SEM1355 with multiple I2C addresses for SDM845 



Currently, SEM1355 has I2C address 0x8. There will be some SEM1355 chips
switching to 0xc. Both are hooked to the same bus qupv3_se10_i2c.

Make one entry for each in DT to support both.

Change-Id: I6b5f20193e04053e8468117b275eb639141a2794
Signed-off-by: default avatarHarry Yang <harryy@codeaurora.org>
parent 84a47e8c

arch/arm64/boot/dts/qcom/sdm845-interposer-sdm670-mtp.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -16,4 +16,5 @@ 


&qupv3_se10_i2c {

	/delete-node/ qcom,smb1355@8;

	/delete-node/ qcom,smb1355@c;

};

arch/arm64/boot/dts/qcom/sdm845-mtp.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -291,7 +291,11 @@ 
	qcom,battery-data = <&mtp_batterydata>;

};



&smb1355_charger {

&smb1355_charger_0 {

	status = "ok";

};



&smb1355_charger_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm845-qrd.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -88,7 +88,11 @@ 
	qcom,fg-bmd-en-delay-ms = <300>;

};



&smb1355_charger {

&smb1355_charger_0 {

	status = "ok";

};



&smb1355_charger_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/smb1355.dtsi

+51 −6
Original line number Diff line number Diff line
@@ -13,30 +13,75 @@ 
#include <dt-bindings/interrupt-controller/irq.h>



&qupv3_se10_i2c {

	smb1355: qcom,smb1355@8 {

	smb1355_0: qcom,smb1355@8 {

		compatible = "qcom,i2c-pmic";

		reg = <0x8>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupt-parent = <&spmi_bus>;

		interrupts = <0x0 0xd1 0x0 IRQ_TYPE_LEVEL_LOW>;

		interrupt_names = "smb1355";

		interrupt_names = "smb1355_0";

		interrupt-controller;

		#interrupt-cells = <3>;

		qcom,periph-map = <0x10 0x12 0x13 0x16>;



		smb1355_revid: qcom,revid@100 {

		smb1355_revid_0: qcom,revid@100 {

			compatible = "qcom,qpnp-revid";

			reg = <0x100 0x100>;

		};



		smb1355_charger: qcom,smb1355-charger@1000 {

		smb1355_charger_0: qcom,smb1355-charger@1000 {

			compatible = "qcom,smb1355";

			qcom,pmic-revid = <&smb1355_revid>;

			qcom,pmic-revid = <&smb1355_revid_0>;

			reg = <0x1000 0x700>;

			#address-cells = <1>;

			#size-cells = <1>;

			interrupt-parent = <&smb1355>;

			interrupt-parent = <&smb1355_0>;

			status = "disabled";



			io-channels = <&pmi8998_rradc 2>,

				      <&pmi8998_rradc 12>;

			io-channel-names = "charger_temp",

					   "charger_temp_max";



			qcom,chgr@1000 {

				reg = <0x1000 0x100>;

				interrupts = <0x10 0x1 IRQ_TYPE_EDGE_RISING>;

				interrupt-names = "chg-state-change";

			};



			qcom,chgr-misc@1600 {

				reg = <0x1600 0x100>;

				interrupts = <0x16 0x1 IRQ_TYPE_EDGE_RISING>;

				interrupt-names = "wdog-bark";

			};

		};

	};



	smb1355_1: qcom,smb1355@c {

		compatible = "qcom,i2c-pmic";

		reg = <0xc>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupt-parent = <&spmi_bus>;

		interrupts = <0x0 0xd1 0x0 IRQ_TYPE_LEVEL_LOW>;

		interrupt_names = "smb1355_1";

		interrupt-controller;

		#interrupt-cells = <3>;

		qcom,periph-map = <0x10 0x12 0x13 0x16>;



		smb1355_revid_1: qcom,revid@100 {

			compatible = "qcom,qpnp-revid";

			reg = <0x100 0x100>;

		};



		smb1355_charger_1: qcom,smb1355-charger@1000 {

			compatible = "qcom,smb1355";

			qcom,pmic-revid = <&smb1355_revid_1>;

			reg = <0x1000 0x700>;

			#address-cells = <1>;

			#size-cells = <1>;

			interrupt-parent = <&smb1355_1>;

			status = "disabled";



			io-channels = <&pmi8998_rradc 2>,