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Commit f5818e03 authored by Gopikrishnaiah Anandan's avatar Gopikrishnaiah Anandan
Browse files

drm/msm/sde: Add color processing support for dual dsi panel 



For dual dsi panel configuration, two dspp's can be used. When two
dspp's are used the color processing driver needs to ensure that reg dma
programming is done for each dspp. Driver needs to set the last command
flag for the current commit. Change adds support for dual dspp support
for color processing through reg dma.

Change-Id: Idca82c110bcf3e736f4bb3dde11d60f904054c8d
Signed-off-by: default avatarGopikrishnaiah Anandan <agopik@codeaurora.org>
parent ee89d210

drivers/gpu/drm/msm/sde/sde_color_processing.c

+13 −2
Original line number Diff line number Diff line
@@ -453,7 +453,7 @@ static void sde_cp_crtc_create_blob_property(struct drm_crtc *crtc, char *name, 
}



static void sde_cp_crtc_setfeature(struct sde_cp_node *prop_node,

				   struct sde_crtc *sde_crtc)

				   struct sde_crtc *sde_crtc, u32 last_feature)

{

	struct sde_hw_cp_cfg hw_cfg;

	struct sde_hw_mixer *hw_lm;
@@ -469,6 +469,10 @@ static void sde_cp_crtc_setfeature(struct sde_cp_node *prop_node, 
		hw_lm = sde_crtc->mixers[i].hw_lm;

		hw_dspp = sde_crtc->mixers[i].hw_dspp;

		hw_cfg.ctl = sde_crtc->mixers[i].hw_ctl;

		if (i == num_mixers - 1)

			hw_cfg.last_feature = last_feature;

		else

			hw_cfg.last_feature = 0;

		switch (prop_node->feature) {

		case SDE_CP_CRTC_DSPP_VLUT:

			if (!hw_dspp || !hw_dspp->ops.setup_vlut) {
@@ -587,6 +591,7 @@ void sde_cp_crtc_apply_properties(struct drm_crtc *crtc) 
	struct sde_hw_ctl *ctl;

	uint32_t flush_mask = 0;

	u32 num_mixers = 0, i = 0;

	u32 num_of_features;



	if (!crtc || !crtc->dev) {

		DRM_ERROR("invalid crtc %pK dev %pK\n", crtc,
@@ -612,9 +617,15 @@ void sde_cp_crtc_apply_properties(struct drm_crtc *crtc) 
		return;

	}



	num_of_features = 0;

	list_for_each_entry(prop_node, &sde_crtc->dirty_list, dirty_list)

		num_of_features++;



	list_for_each_entry_safe(prop_node, n, &sde_crtc->dirty_list,

							dirty_list) {

		sde_cp_crtc_setfeature(prop_node, sde_crtc);

		num_of_features--;

		sde_cp_crtc_setfeature(prop_node, sde_crtc,

				(num_of_features == 0));

		/* Set the flush flag to true */

		if (prop_node->is_dspp_feature)

			set_dspp_flush = true;

drivers/gpu/drm/msm/sde/sde_hw_mdss.h

+2 −0
Original line number Diff line number Diff line
@@ -446,11 +446,13 @@ struct sde_mdss_color { 
 * @payload: Feature specific payload.

 * @len: Length of the payload.

 * @ctl: control pointer associated with dspp/lm.

 * @last_feature: last feature that will be set.

 */

struct sde_hw_cp_cfg {

	void *payload;

	u32 len;

	void *ctl;

	u32 last_feature;

};



/**

drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c

+2 −0
Original line number Diff line number Diff line
@@ -468,6 +468,7 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[GAMUT][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE);

	kick_off.last_command = hw_cfg->last_feature;

	rc = dma_ops->kick_off(&kick_off);

	if (rc)

		DRM_ERROR("failed to kick off ret %d\n", rc);
@@ -540,6 +541,7 @@ void reg_dmav1_setup_dspp_gcv18(struct sde_hw_dspp *ctx, void *cfg) 


	REG_DMA_SETUP_KICKOFF(kick_off, hw_cfg->ctl, dspp_buf[GC][ctx->idx],

			REG_DMA_WRITE, DMA_CTL_QUEUE0, WRITE_IMMEDIATE);

	kick_off.last_command = hw_cfg->last_feature;

	rc = dma_ops->kick_off(&kick_off);

	if (rc) {

		DRM_ERROR("failed to kick off ret %d\n", rc);