Loading drivers/iommu/io-pgtable-arm.c +4 −2 Original line number Diff line number Diff line Loading @@ -477,12 +477,14 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, pte |= (prot & IOMMU_PRIV) ? ARM_LPAE_PTE_AP_PRIV_RO : ARM_LPAE_PTE_AP_RO; if (prot & IOMMU_MMIO) if (prot & IOMMU_MMIO) { pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV << ARM_LPAE_PTE_ATTRINDX_SHIFT); else if (prot & IOMMU_CACHE) } else if (prot & IOMMU_CACHE) { pte |= (ARM_LPAE_MAIR_ATTR_IDX_CACHE << ARM_LPAE_PTE_ATTRINDX_SHIFT); pte |= ARM_LPAE_PTE_SH_OS; } } else { pte = ARM_LPAE_PTE_HAP_FAULT; if (prot & IOMMU_READ) Loading Loading
drivers/iommu/io-pgtable-arm.c +4 −2 Original line number Diff line number Diff line Loading @@ -477,12 +477,14 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, pte |= (prot & IOMMU_PRIV) ? ARM_LPAE_PTE_AP_PRIV_RO : ARM_LPAE_PTE_AP_RO; if (prot & IOMMU_MMIO) if (prot & IOMMU_MMIO) { pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV << ARM_LPAE_PTE_ATTRINDX_SHIFT); else if (prot & IOMMU_CACHE) } else if (prot & IOMMU_CACHE) { pte |= (ARM_LPAE_MAIR_ATTR_IDX_CACHE << ARM_LPAE_PTE_ATTRINDX_SHIFT); pte |= ARM_LPAE_PTE_SH_OS; } } else { pte = ARM_LPAE_PTE_HAP_FAULT; if (prot & IOMMU_READ) Loading