Merge "phy: msm: usb: Remove dedicated charger type support"

- qcom,hsusb-l1-supported: If present, the device supports l1 (Link power

	management).

- qcom,no-selective-suspend: If present selective suspend is disabled on hub ports.

- qcom,hsusb-otg-mpm-dpsehv-int: If present, indicates mpm interrupt to be

	configured for detection of dp line transition during VDD minimization.

- qcom,hsusb-otg-mpm-dmsehv-int: If present, indicates mpm interrupt to be

	configured for detection of dm line transition during VDD minimization.

- pinctrl-names : This should be defined if a target uses gpio and pinctrl framework.

  See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.

  It should specify the names of the configs that pinctrl can install in driver

	devicetree/bindings/usb/android-dev.txt for details about "streaming-func" property.

- qcom,axi-prefetch-enable: If present, AXI64 interface will be used for transferring data

       to/from DDR by controller.

- qcom,enable-sdp-typec-current-limit: Indicates whether type-c current for SDP CHARGER to

	be limited.

- qcom,enable-phy-id-pullup: If present, PHY can keep D+ pull-up resistor on USB ID line

	during cable disconnect.

- qcom,max-svs-sysclk-rate: Indicates system clock frequency voted by driver in

                HSUSB_3p3-supply = <&pm8226_l20>;

		qcom,vdd-voltage-level = <1 5 7>;

		qcom,dp-manual-pullup;

		qcom,hsusb-otg-mpm-dpsehv-int = <49>;

		qcom,hsusb-otg-mpm-dmsehv-int = <58>;

		qcom,max-nominal-sysclk-rate = <133330000>;

		qcom,max-svs-sysclk-rate = <100000000>;

		qcom,pm-qos-latency = <59>;

			(unsigned long) mEp);

	}

	arch_setup_dma_ops(&udc->gadget.dev, 0, DMA_BIT_MASK(32), NULL, false);

	for (i = 0; i < hw_ep_max/2; i++) {

		for (j = RX; j <= TX; j++) {

			int k = i + j * hw_ep_max/2;

			mEp->ep.name      = mEp->name;

			mEp->ep.ops       = &usb_ep_ops;

			if (i == 0) {

				mEp->ep.caps.type_control = true;

			} else {

				mEp->ep.caps.type_iso = true;

				mEp->ep.caps.type_bulk = true;

				mEp->ep.caps.type_int = true;

			}

			if (j == TX)

				mEp->ep.caps.dir_in = true;

			else

				mEp->ep.caps.dir_out = true;

			usb_ep_set_maxpacket_limit(&mEp->ep,

				k ? USHRT_MAX : CTRL_PAYLOAD_MAX);

	INIT_WORK(&gadget->work, usb_gadget_state_work);

	gadget->dev.parent = parent;

	dma_set_coherent_mask(&gadget->dev, parent->coherent_dma_mask);

	gadget->dev.dma_parms = parent->dma_parms;

	gadget->dev.dma_mask = parent->dma_mask;

	if (release)

		gadget->dev.release = release;

	else

	USB_NOC_NUM_VOTE,

};

/**

 * Different states involved in USB charger detection.

 *

 * USB_CHG_STATE_UNDEFINED	USB charger is not connected or detection

 *                              process is not yet started.

 * USB_CHG_STATE_IN_PROGRESS	Charger detection in progress

 * USB_CHG_STATE_WAIT_FOR_DCD	Waiting for Data pins contact.

 * USB_CHG_STATE_DCD_DONE	Data pin contact is detected.

 * USB_CHG_STATE_PRIMARY_DONE	Primary detection is completed (Detects

 *                              between SDP and DCP/CDP).

 * USB_CHG_STATE_SECONDARY_DONE	Secondary detection is completed (Detects

 *                              between DCP and CDP).

 * USB_CHG_STATE_DETECTED	USB charger type is determined.

 *

 */

enum usb_chg_state {

	USB_CHG_STATE_UNDEFINED = 0,

	USB_CHG_STATE_IN_PROGRESS,

	USB_CHG_STATE_WAIT_FOR_DCD,

	USB_CHG_STATE_DCD_DONE,

	USB_CHG_STATE_PRIMARY_DONE,

	USB_CHG_STATE_SECONDARY_DONE,

	USB_CHG_STATE_DETECTED,

};

/**

 * USB charger types

 *

 * @async_int: IRQ line on which ASYNC interrupt arrived in LPM.

 * @cur_power: The amount of mA available from downstream port.

 * @otg_wq: Strict order otg workqueue for OTG works (SM/ID/SUSPEND).

 * @chg_work: Charger detection work.

 * @chg_state: The state of charger detection process.

 * @chg_type: The type of charger attached.

 * @bus_perf_client: Bus performance client handle to request BUS bandwidth

 * @host_bus_suspend: indicates host bus suspend or not.

 * @device_bus_suspend: indicates device bus suspend or not.

 * @bus_clks_enabled: indicates pcnoc/snoc/bimc clocks are on or not.

 * @chg_check_timer: The timer used to implement the workaround to detect

 *               very slow plug in of wall charger.

 * @bc1p2_current_max: Max charging current allowed as per bc1.2 chg detection

 * @typec_current_max: Max charging current allowed as per type-c chg detection

 * @is_ext_chg_dcp: To indicate whether charger detected by external entity

		SMB hardware is DCP charger or not.

 * @ext_id_irq: IRQ for ID interrupt.

#define ID		0

#define B_SESS_VLD	1

#define A_BUS_SUSPEND	14

#define B_FALSE_SDP	18

	unsigned long inputs;

	struct work_struct sm_work;

	bool sm_work_pending;

	int async_int;

	unsigned int cur_power;

	struct workqueue_struct *otg_wq;

	struct delayed_work chg_work;

	struct delayed_work id_status_work;

	enum usb_chg_state chg_state;

	enum usb_chg_type chg_type;

	unsigned int dcd_time;

	unsigned long caps;

	bool host_bus_suspend;

	bool device_bus_suspend;

	bool bus_clks_enabled;

	struct timer_list chg_check_timer;

	/*

	 * Allowing PHY power collpase turns off the HSUSB 3.3v and 1.8v

	 * analog regulators while going to low power mode.

#define PHY_REGULATORS_LPM	BIT(4)

	int reset_counter;

	unsigned int online;

	unsigned int host_mode;

	unsigned int bc1p2_current_max;

	unsigned int typec_current_max;

	dev_t ext_chg_dev;

	struct cdev ext_chg_cdev;

	struct class *ext_chg_class;

	struct device *ext_chg_device;

	bool ext_chg_opened;

	enum usb_ext_chg_status ext_chg_active;

	struct completion ext_chg_wait;

	struct pinctrl *phy_pinctrl;

	bool is_ext_chg_dcp;

	struct qpnp_vadc_chip	*vadc_dev;