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Commit f52948ea authored by Soren Brinkmann's avatar Soren Brinkmann Committed by Michal Simek
Browse files

ARM: zynq: DT: Add pinctrl information 



Add pinctrl descriptions to the zc702 and zc706 device trees.

Signed-off-by: default avatarSoren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: default avatarAndreas Färber <afaerber@suse.de>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 1643b316

arch/arm/boot/dts/zynq-7000.dtsi

+7 −1
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ 
		slcr: slcr@f8000000 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "xlnx,zynq-slcr", "syscon";

			compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";

			reg = <0xF8000000 0x1000>;

			ranges;

			clkc: clkc@100 {
@@ -257,6 +257,12 @@ 
						"dbg_trc", "dbg_apb";

				reg = <0x100 0x100>;

			};



			pinctrl0: pinctrl@700 {

				compatible = "xlnx,pinctrl-zynq";

				reg = <0x700 0x200>;

				syscon = <&slcr>;

			};

		};



		dmac_s: dmac@f8003000 {

arch/arm/boot/dts/zynq-zc702.dts

+181 −0
Original line number Diff line number Diff line
@@ -45,6 +45,8 @@ 


&can0 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_can0_default>;

};



&clkc {
@@ -55,15 +57,24 @@ 
	status = "okay";

	phy-mode = "rgmii-id";

	phy-handle = <&ethernet_phy>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gem0_default>;



	ethernet_phy: ethernet-phy@7 {

		reg = <7>;

	};

};



&gpio0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gpio0_default>;

};



&i2c0 {

	status = "okay";

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c0_default>;



	i2cswitch@74 {

		compatible = "nxp,pca9548";
@@ -137,12 +148,182 @@ 
	};

};



&pinctrl0 {

	pinctrl_can0_default: can0-default {

		mux {

			function = "can0";

			groups = "can0_9_grp";

		};



		conf {

			groups = "can0_9_grp";

			slew-rate = <0>;

			io-standard = <1>;

		};



		conf-rx {

			pins = "MIO46";

			bias-high-impedance;

		};



		conf-tx {

			pins = "MIO47";

			bias-disable;

		};

	};



	pinctrl_gem0_default: gem0-default {

		mux {

			function = "ethernet0";

			groups = "ethernet0_0_grp";

		};



		conf {

			groups = "ethernet0_0_grp";

			slew-rate = <0>;

			io-standard = <4>;

		};



		conf-rx {

			pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";

			bias-high-impedance;

			low-power-disable;

		};



		conf-tx {

			pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";

			bias-disable;

			low-power-enable;

		};



		mux-mdio {

			function = "mdio0";

			groups = "mdio0_0_grp";

		};



		conf-mdio {

			groups = "mdio0_0_grp";

			slew-rate = <0>;

			io-standard = <1>;

			bias-disable;

		};

	};



	pinctrl_gpio0_default: gpio0-default {

		mux {

			function = "gpio0";

			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",

				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",

				 "gpio0_13_grp", "gpio0_14_grp";

		};



		conf {

			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",

				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",

				 "gpio0_13_grp", "gpio0_14_grp";

			slew-rate = <0>;

			io-standard = <1>;

		};



		conf-pull-up {

			pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";

			bias-pull-up;

		};



		conf-pull-none {

			pins = "MIO7", "MIO8";

			bias-disable;

		};

	};



	pinctrl_i2c0_default: i2c0-default {

		mux {

			groups = "i2c0_10_grp";

			function = "i2c0";

		};



		conf {

			groups = "i2c0_10_grp";

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};

	};



	pinctrl_sdhci0_default: sdhci0-default {

		mux {

			groups = "sdio0_2_grp";

			function = "sdio0";

		};



		conf {

			groups = "sdio0_2_grp";

			slew-rate = <0>;

			io-standard = <1>;

			bias-disable;

		};



		mux-cd {

			groups = "gpio0_0_grp";

			function = "sdio0_cd";

		};



		conf-cd {

			groups = "gpio0_0_grp";

			bias-high-impedance;

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};



		mux-wp {

			groups = "gpio0_15_grp";

			function = "sdio0_wp";

		};



		conf-wp {

			groups = "gpio0_15_grp";

			bias-high-impedance;

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};

	};



	pinctrl_uart1_default: uart1-default {

		mux {

			groups = "uart1_10_grp";

			function = "uart1";

		};



		conf {

			groups = "uart1_10_grp";

			slew-rate = <0>;

			io-standard = <1>;

		};



		conf-rx {

			pins = "MIO49";

			bias-high-impedance;

		};



		conf-tx {

			pins = "MIO48";

			bias-disable = <0>;

		};

	};

};



&sdhci0 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_sdhci0_default>;

};



&uart1 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1_default>;

};



&usb0 {

arch/arm/boot/dts/zynq-zc706.dts

+152 −0
Original line number Diff line number Diff line
@@ -41,15 +41,24 @@ 
	status = "okay";

	phy-mode = "rgmii-id";

	phy-handle = <&ethernet_phy>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gem0_default>;



	ethernet_phy: ethernet-phy@7 {

		reg = <7>;

	};

};



&gpio0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gpio0_default>;

};



&i2c0 {

	status = "okay";

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c0_default>;



	i2cswitch@74 {

		compatible = "nxp,pca9548";
@@ -115,12 +124,155 @@ 
	};

};



&pinctrl0 {

	pinctrl_gem0_default: gem0-default {

		mux {

			function = "ethernet0";

			groups = "ethernet0_0_grp";

		};



		conf {

			groups = "ethernet0_0_grp";

			slew-rate = <0>;

			io-standard = <4>;

		};



		conf-rx {

			pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";

			bias-high-impedance;

			low-power-disable;

		};



		conf-tx {

			pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";

			low-power-enable;

			bias-disable;

		};



		mux-mdio {

			function = "mdio0";

			groups = "mdio0_0_grp";

		};



		conf-mdio {

			groups = "mdio0_0_grp";

			slew-rate = <0>;

			io-standard = <1>;

			bias-disable;

		};

	};



	pinctrl_gpio0_default: gpio0-default {

		mux {

			function = "gpio0";

			groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";

		};



		conf {

			groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";

			slew-rate = <0>;

			io-standard = <1>;

		};



		conf-pull-up {

			pins = "MIO46", "MIO47";

			bias-pull-up;

		};



		conf-pull-none {

			pins = "MIO7";

			bias-disable;

		};

	};



	pinctrl_i2c0_default: i2c0-default {

		mux {

			groups = "i2c0_10_grp";

			function = "i2c0";

		};



		conf {

			groups = "i2c0_10_grp";

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};

	};



	pinctrl_sdhci0_default: sdhci0-default {

		mux {

			groups = "sdio0_2_grp";

			function = "sdio0";

		};



		conf {

			groups = "sdio0_2_grp";

			slew-rate = <0>;

			io-standard = <1>;

			bias-disable;

		};



		mux-cd {

			groups = "gpio0_14_grp";

			function = "sdio0_cd";

		};



		conf-cd {

			groups = "gpio0_14_grp";

			bias-high-impedance;

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};



		mux-wp {

			groups = "gpio0_15_grp";

			function = "sdio0_wp";

		};



		conf-wp {

			groups = "gpio0_15_grp";

			bias-high-impedance;

			bias-pull-up;

			slew-rate = <0>;

			io-standard = <1>;

		};

	};



	pinctrl_uart1_default: uart1-default {

		mux {

			groups = "uart1_10_grp";

			function = "uart1";

		};



		conf {

			groups = "uart1_10_grp";

			slew-rate = <0>;

			io-standard = <1>;

		};



		conf-rx {

			pins = "MIO49";

			bias-high-impedance;

		};



		conf-tx {

			pins = "MIO48";

			bias-disable;

		};

	};

};



&sdhci0 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_sdhci0_default>;

};



&uart1 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1_default>;

};



&usb0 {