Commit f4f0b6aa authored Oct 01, 2017 by Ilia Mirkin Committed by Greg Kroah-Hartman Oct 27, 2017

drm/nouveau/bsp/g92: disable by default



commit 194d68dd051c2dd5ac2b522ae16100e774e8d869 upstream.

G92's seem to require some additional bit of initialization before the
BSP engine can work. It feels like clocks are not set up for the
underlying VLD engine, which means that all commands submitted to the
xtensa chip end up hanging. VP seems to work fine though.

This still allows people to force-enable the bsp engine if they want to
play around with it, but makes it harder for the card to hang by
default.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 587d7faf

drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -39,5 +39,5 @@ int
		g84_bsp_new(struct nvkm_device device, int index, struct nvkm_engine *pengine)
		{
		return nvkm_xtensa_new_(&g84_bsp, device, index,
		true, 0x103000, pengine);
		device->chipset != 0x92, 0x103000, pengine);
		}