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Commit f444b814 authored by Kyle Yan's avatar Kyle Yan
Browse files

soc: qcom: Add GCC_MSS_AXIS2_CLK and GCC_PRNG_AHB_CLK as proxy on sdm845 



Add both GCC_PRNG_AHB_CLK and GCC_MSS_AXIS2_CLK as proxy voted clocks
for modem PIL on sdm845.

Change-Id: If62c63f86800ca7652889aac186953e8f82f5c78
Signed-off-by: default avatarKyle Yan <kyan@codeaurora.org>
parent 68e85fd7

drivers/soc/qcom/pil-q6v5.c

+36 −0
Original line number Diff line number Diff line
@@ -120,6 +120,18 @@ int pil_q6v5_make_proxy_votes(struct pil_desc *pil) 
		goto err_qdss_vote;

	}



	ret = clk_prepare_enable(drv->prng_clk);

	if (ret) {

		dev_err(pil->dev, "Failed to vote for prng(rc:%d)\n", ret);

		goto err_prng_vote;

	}



	ret = clk_prepare_enable(drv->axis2_clk);

	if (ret) {

		dev_err(pil->dev, "Failed to vote for axis2(rc:%d)\n", ret);

		goto err_axis2_vote;

	}



	ret = regulator_set_voltage(drv->vreg_cx, uv, INT_MAX);

	if (ret) {

		dev_err(pil->dev, "Failed to request vdd_cx voltage(rc:%d)\n",
@@ -157,6 +169,10 @@ int pil_q6v5_make_proxy_votes(struct pil_desc *pil) 
err_cx_mode:

	regulator_set_voltage(drv->vreg_cx, 0, uv);

err_cx_voltage:

	clk_disable_unprepare(drv->axis2_clk);

err_axis2_vote:

	clk_disable_unprepare(drv->prng_clk);

err_prng_vote:

	clk_disable_unprepare(drv->qdss_clk);

err_qdss_vote:

	clk_disable_unprepare(drv->pnoc_clk);
@@ -189,6 +205,8 @@ void pil_q6v5_remove_proxy_votes(struct pil_desc *pil) 
	clk_disable_unprepare(drv->xo);

	clk_disable_unprepare(drv->pnoc_clk);

	clk_disable_unprepare(drv->qdss_clk);

	clk_disable_unprepare(drv->prng_clk);

	clk_disable_unprepare(drv->axis2_clk);

}

EXPORT_SYMBOL(pil_q6v5_remove_proxy_votes);
@@ -763,6 +781,24 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) 
		drv->qdss_clk = NULL;

	}



	if (of_property_match_string(pdev->dev.of_node,

			"qcom,proxy-clock-names", "prng_clk") >= 0) {

		drv->prng_clk = devm_clk_get(&pdev->dev, "prng_clk");

		if (IS_ERR(drv->prng_clk))

			return ERR_CAST(drv->prng_clk);

	} else {

		drv->prng_clk = NULL;

	}



	if (of_property_match_string(pdev->dev.of_node,

			"qcom,proxy-clock-names", "axis2_clk") >= 0) {

		drv->axis2_clk = devm_clk_get(&pdev->dev, "axis2_clk");

		if (IS_ERR(drv->axis2_clk))

			return ERR_CAST(drv->axis2_clk);

	} else {

		drv->axis2_clk = NULL;

	}



	drv->vreg_cx = devm_regulator_get(&pdev->dev, "vdd_cx");

	if (IS_ERR(drv->vreg_cx))

		return ERR_CAST(drv->vreg_cx);

drivers/soc/qcom/pil-q6v5.h

+3 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -35,6 +35,8 @@ struct q6v5_data { 
	struct clk *snoc_axi_clk;

	struct clk *mnoc_axi_clk;

	struct clk *qdss_clk;

	struct clk *prng_clk;

	struct clk *axis2_clk;

	void __iomem *axi_halt_base; /* Halt base of q6, mss,

				      * nc are in same 4K page

				      */