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Commit f40aaf6d authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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ARM: mach-shmobile: r8a7779 SMP support V3 



This patch contains r8a7779 SMP support V3 - now including
CPU hotplug offine and online support. The r8a7779 power
domain code is tied together with SMP glue code which allows
us to control the power domains via CPU hotplug.

At this point the kernel boots with the 4 Cortex-A9 cores in
SMP mode and all CPU cores except CPU0 can be hotplugged.

The code in platsmp.c is quite far from pretty, but it is
kept like that intentionally to avoid creating layers of
code that will go away in the near future anyway. The code
needs to be updated when some per-SoC handling code will be
added to the ARM architecture, see the following patch for
more information:
 "[RFC PATCH 0/3] Per SoC descriptor"

Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent f0a217a3

arch/arm/mach-shmobile/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ smp-y := platsmp.o headsmp.o 
smp-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o

smp-$(CONFIG_LOCAL_TIMERS)	+= localtimer.o

smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o

smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o



# Pinmux setup

pfc-y				:=

arch/arm/mach-shmobile/include/mach/common.h

+6 −0
Original line number Diff line number Diff line
@@ -68,4 +68,10 @@ extern void r8a7779_clock_init(void); 
extern void r8a7779_pinmux_init(void);

extern void r8a7779_pm_init(void);



extern unsigned int r8a7779_get_core_count(void);

extern int r8a7779_platform_cpu_kill(unsigned int cpu);

extern void r8a7779_secondary_init(unsigned int cpu);

extern int r8a7779_boot_secondary(unsigned int cpu);

extern void r8a7779_smp_prepare_cpus(void);



#endif /* __ARCH_MACH_COMMON_H */

arch/arm/mach-shmobile/include/mach/r8a7779.h

+3 −0
Original line number Diff line number Diff line
@@ -343,6 +343,9 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d) 
	return &container_of(d, struct r8a7779_pm_domain, genpd)->ch;

}



extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch);

extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);



#ifdef CONFIG_PM

extern struct r8a7779_pm_domain r8a7779_sh4a;

extern struct r8a7779_pm_domain r8a7779_sgx;

arch/arm/mach-shmobile/platsmp.c

+16 −0
Original line number Diff line number Diff line
@@ -22,12 +22,16 @@ 
#include <mach/common.h>



#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2())

#define is_r8a7779() machine_is_marzen()



static unsigned int __init shmobile_smp_get_core_count(void)

{

	if (is_sh73a0())

		return sh73a0_get_core_count();



	if (is_r8a7779())

		return r8a7779_get_core_count();



	return 1;

}
@@ -35,10 +39,16 @@ static void __init shmobile_smp_prepare_cpus(void) 
{

	if (is_sh73a0())

		sh73a0_smp_prepare_cpus();



	if (is_r8a7779())

		r8a7779_smp_prepare_cpus();

}



int shmobile_platform_cpu_kill(unsigned int cpu)

{

	if (is_r8a7779())

		return r8a7779_platform_cpu_kill(cpu);



	return 1;

}
@@ -48,6 +58,9 @@ void __cpuinit platform_secondary_init(unsigned int cpu) 


	if (is_sh73a0())

		sh73a0_secondary_init(cpu);



	if (is_r8a7779())

		r8a7779_secondary_init(cpu);

}



int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -55,6 +68,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 
	if (is_sh73a0())

		return sh73a0_boot_secondary(cpu);



	if (is_r8a7779())

		return r8a7779_boot_secondary(cpu);



	return -ENOSYS;

}

arch/arm/mach-shmobile/pm-r8a7779.c

+22 −8
Original line number Diff line number Diff line
@@ -48,7 +48,9 @@ static void __iomem *r8a7779_sysc_base; 
#define SYSCISR_RETRIES 1000

#define SYSCISR_DELAY_US 1



#ifdef CONFIG_PM

#if defined(CONFIG_PM) || defined(CONFIG_SMP)



static DEFINE_SPINLOCK(r8a7779_sysc_lock); /* SMP CPUs + I/O devices */



static int r8a7779_sysc_pwr_on_off(struct r8a7779_pm_ch *r8a7779_ch,

				   int sr_bit, int reg_offs)
@@ -86,9 +88,12 @@ static int r8a7779_sysc_update(struct r8a7779_pm_ch *r8a7779_ch, 
	unsigned int isr_mask = 1 << r8a7779_ch->isr_bit;

	unsigned int chan_mask = 1 << r8a7779_ch->chan_bit;

	unsigned int status;

	unsigned long flags;

	int ret = 0;

	int k;



	spin_lock_irqsave(&r8a7779_sysc_lock, flags);



	iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);



	do {
@@ -112,6 +117,8 @@ static int r8a7779_sysc_update(struct r8a7779_pm_ch *r8a7779_ch, 
	iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);



 out:

	spin_unlock_irqrestore(&r8a7779_sysc_lock, flags);



	pr_debug("r8a7779 power domain %d: %02x %02x %02x %02x %02x -> %d\n",

		 r8a7779_ch->isr_bit, ioread32(r8a7779_sysc_base + PWRSR0),

		 ioread32(r8a7779_sysc_base + PWRSR1),
@@ -121,12 +128,12 @@ static int r8a7779_sysc_update(struct r8a7779_pm_ch *r8a7779_ch, 
	return ret;

}



static int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch)

int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch)

{

	return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_off);

}



static int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch)

int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch)

{

	return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_on);

}
@@ -142,6 +149,14 @@ static void __init r8a7779_sysc_init(void) 
	iowrite32(0, r8a7779_sysc_base + SYSCIMR);

}



#else /* CONFIG_PM || CONFIG_SMP */



static inline void r8a7779_sysc_init(void) {}



#endif /* CONFIG_PM || CONFIG_SMP */



#ifdef CONFIG_PM



static int pd_power_down(struct generic_pm_domain *genpd)

{

	return r8a7779_sysc_power_down(to_r8a7779_ch(genpd));
@@ -223,13 +238,12 @@ struct r8a7779_pm_domain r8a7779_impx3 = { 
	}

};



#else /* CONFIG_PM */



static inline void r8a7779_sysc_init(void) {}



#endif /* CONFIG_PM */



void __init r8a7779_pm_init(void)

{

	static int once;



	if (!once++)

		r8a7779_sysc_init();

}