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Commit f3f01175 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Revert "x86/pci/mrst: Use configuration mechanism 1 for 00:00.0, 00:02.0, 00:03.0" 

This reverts commit dd72be99.

Andy Shevchenko <andy.shevchenko@gmail.com> reported that this commit
broke Intel Medfield devices.

Reference: https://lkml.kernel.org/r/CAHp75Vdf6gFZChS47=grUygHBDWcoOWDYPzw+Zj5bdVCWj85Jw@mail.gmail.com


Reported-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 3f327e39

arch/x86/pci/mrst.c

+4 −6
Original line number Diff line number Diff line
@@ -141,11 +141,6 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, 
 */

static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)

{

	if (bus == 0 && (devfn == PCI_DEVFN(2, 0)

				|| devfn == PCI_DEVFN(0, 0)

				|| devfn == PCI_DEVFN(3, 0)))

		return 1;



	/* This is a workaround for A0 LNC bug where PCI status register does

	 * not have new CAP bit set. can not be written by SW either.

	 *
@@ -155,7 +150,10 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) 
	 */

	if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)

		return 0;



	if (bus == 0 && (devfn == PCI_DEVFN(2, 0)

				|| devfn == PCI_DEVFN(0, 0)

				|| devfn == PCI_DEVFN(3, 0)))

		return 1;

	return 0; /* langwell on others */

}