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Commit f3a0867b authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by H. Peter Anvin
Browse files

x86, mce: fix reporting of Thermal Monitoring mechanism enabled 



Early Pentium M models use different method for enabling TM2
(per paragraph 13.5.2.3 of the "Intel 64 and IA-32 Architectures
Software Developer's Manual Volume 3A: System Programming Guide,
Part 1").

Tested on the affected Pentium M variant (model == 13).

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Cc: Andi Kleen <andi@firstfloor.org>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent d0c87d1f

arch/x86/include/asm/msr-index.h

+4 −0
Original line number Diff line number Diff line
@@ -222,6 +222,10 @@ 


#define THERM_STATUS_PROCHOT		(1 << 0)



#define MSR_THERM2_CTL			0x0000019d



#define MSR_THERM2_CTL_TM_SELECT	(1ULL << 16)



#define MSR_IA32_MISC_ENABLE		0x000001a0



/* MISC_ENABLE bits: architectural */

arch/x86/kernel/cpu/mcheck/therm_throt.c

+10 −3
Original line number Diff line number Diff line
@@ -253,9 +253,6 @@ void intel_init_thermal(struct cpuinfo_x86 *c) 
		return;

	}



	if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))

		tm2 = 1;



	/* Check whether a vector already exists */

	if (h & APIC_VECTOR_MASK) {

		printk(KERN_DEBUG
@@ -264,6 +261,16 @@ void intel_init_thermal(struct cpuinfo_x86 *c) 
		return;

	}



	/* early Pentium M models use different method for enabling TM2 */

	if (cpu_has(c, X86_FEATURE_TM2)) {

		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {

			rdmsr(MSR_THERM2_CTL, l, h);

			if (l & MSR_THERM2_CTL_TM_SELECT)

				tm2 = 1;

		} else if (l & MSR_IA32_MISC_ENABLE_TM2)

			tm2 = 1;

	}



	/* We'll mask the thermal vector in the lapic till we're ready: */

	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;

	apic_write(APIC_LVTTHMR, h);