Loading arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -248,13 +248,13 @@ clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_gcc GCC_GPU_CFG_AHB_CLK>, <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; clock-names = "gmu_clk", "ahb_clk", "cxo_clk", "axi_clk", "memnoc_clk"; clock-names = "gmu_clk", "cxo_clk", "axi_clk", "memnoc_clk", "ahb_clk"; qcom,gmu-pwrlevels { #address-cells = <1>; Loading Loading
arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -248,13 +248,13 @@ clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>, <&clock_gcc GCC_GPU_CFG_AHB_CLK>, <&clock_gpucc GPU_CC_CXO_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; clock-names = "gmu_clk", "ahb_clk", "cxo_clk", "axi_clk", "memnoc_clk"; clock-names = "gmu_clk", "cxo_clk", "axi_clk", "memnoc_clk", "ahb_clk"; qcom,gmu-pwrlevels { #address-cells = <1>; Loading