Merge "coresight-etm4x: enable ETM driver on SDM845" into msm-4.9 (f2859ae7) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/hwtracing/coresight/coresight-etm4x.c

+5 −5

Original line number	Diff line number	Diff line
		/* Copyright (c) 2014, 2016, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2014, 2016-2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -62,7 +62,7 @@ static void etm4_os_unlock(struct etmv4_drvdata *drvdata)
		static bool etm4_arch_supported(u8 arch)
		{
		switch (arch) {
		case ETM_ARCH_V4:
		case ETM_ARCH_MAJOR_V4:
		break;
		default:
		return false;
		@@ -482,7 +482,7 @@ static void etm4_init_arch_data(void *info)
		* TRCARCHMIN, bits[7:4] architecture the minor version number
		* TRCARCHMAJ, bits[11:8] architecture major versin number
		*/
		drvdata->arch = BMVAL(etmidr1, 4, 11);
		drvdata->arch = BMVAL(etmidr1, 8, 11);

		/* maximum size of resources */
		etmidr2 = readl_relaxed(drvdata->base + TRCIDR2);
		@@ -528,8 +528,8 @@ static void etm4_init_arch_data(void *info)
		else
		drvdata->sysstall = false;

		/* NUMPROC, bits[30:28] the number of PEs available for tracing */
		drvdata->nr_pe = BMVAL(etmidr3, 28, 30);
		/* NUMPROC, bits[13:12, 30:28] the number of PEs available for trace */
		drvdata->nr_pe = (BMVAL(etmidr3, 12, 13) << 3) \| BMVAL(etmidr3, 28, 30);

		/* NOOVERFLOW, bit[31] is trace overflow prevention supported */
		if (BMVAL(etmidr3, 31, 31))

+2 −2

Original line number	Diff line number	Diff line
		/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -143,7 +143,7 @@
		#define ETM_MAX_RES_SEL 16
		#define ETM_MAX_SS_CMP 8

		#define ETM_ARCH_V4 0x40
		#define ETM_ARCH_MAJOR_V4 0x4
		#define ETMv4_SYNC_MASK 0x1F
		#define ETM_CYC_THRESHOLD_MASK 0xFFF
		#define ETMv4_EVENT_MASK 0xFF

+2 −2

Original line number	Diff line number	Diff line
		@@ -19,7 +19,7 @@
		#define _LINUX_CORESIGHT_PMU_H

		#define CORESIGHT_ETM_PMU_NAME "cs_etm"
		#define CORESIGHT_ETM_PMU_SEED 0x10
		#define CORESIGHT_ETM_PMU_SEED 0x01

		/* ETMv3.5/PTM's ETMCR config bit */
		#define ETM_OPT_CYCACC 12
		@@ -33,7 +33,7 @@ static inline int coresight_get_trace_id(int cpu)
		* the common convention is to have data trace IDs be I(N) + 1,
		* set instruction trace IDs as a function of the CPU number.
		*/
		return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));
		return (CORESIGHT_ETM_PMU_SEED + cpu);
		}

		#endif