Merge "ARM: dts: msm: Modify UART pins configurations SDM670" (f1eb40d1) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi

+23 −14

Original line number	Diff line number	Diff line
		@@ -418,33 +418,42 @@
		};

		qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
		qupv3_se6_4uart_active: qupv3_se6_4uart_active {
		qupv3_se6_ctsrx: qupv3_se6_ctsrx {
		mux {
		pins = "gpio45", "gpio46", "gpio47",
		"gpio48";
		pins = "gpio45", "gpio48";
		function = "qup6";
		};

		config {
		pins = "gpio45", "gpio46", "gpio47",
		"gpio48";
		pins = "gpio45", "gpio48";
		drive-strength = <2>;
		bias-disable;
		bias-no-pull;
		};
		};

		qupv3_se6_4uart_sleep: qupv3_se6_4uart_sleep {
		qupv3_se6_rts: qupv3_se6_rts {
		mux {
		pins = "gpio45", "gpio46", "gpio47",
		"gpio48";
		function = "gpio";
		pins = "gpio46";
		function = "qup6";
		};

		config {
		pins = "gpio45", "gpio46", "gpio47",
		"gpio48";
		pins = "gpio46";
		drive-strength = <2>;
		bias-disable;
		bias-pull-down;
		};
		};

		qupv3_se6_tx: qupv3_se6_tx {
		mux {
		pins = "gpio47";
		function = "qup6";
		};

		config {
		pins = "gpio47";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};
		@@ -927,7 +936,7 @@
		config {
		pins = "gpio51", "gpio52";
		drive-strength = <2>;
		bias-disable;
		bias-pull-down;
		};
		};
		};

+4 −2

Original line number	Diff line number	Diff line
		@@ -40,8 +40,10 @@
		<&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
		<&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&qupv3_se6_4uart_active>;
		pinctrl-1 = <&qupv3_se6_4uart_sleep>;
		pinctrl-0 = <&qupv3_se6_ctsrx>, <&qupv3_se6_rts>,
		<&qupv3_se6_tx>;
		pinctrl-1 = <&qupv3_se6_ctsrx>, <&qupv3_se6_rts>,
		<&qupv3_se6_tx>;
		interrupts-extended = <&pdc GIC_SPI 607 0>,
		<&tlmm 48 0>;
		status = "disabled";