Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f1c9c979 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 's5p-fixes-for-linus' of...

Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung

* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C64XX: Add IORESOURCE_IRQ_HIGHLEVEL flag to dm9000 on mach-real6410
  ARM: S3C64XX: Fix coding style errors on mach-real6410
  ARM: S3C64XX: Prototype SPI devices
  ARM: S3C64XX: Fix dev-spi build
  ARM: SAMSUNG: Fix on s5p_gpio_[get,set]_drvstr
  ARM: SAMSUNG: Fix on drive strength value
  ARM: S5PV210: Add FIMC clocks
  ARM: S5PV210: Reduce the iodesc length of systimer
  ARM: S5PV210: Update I2C-1 Clock Register Property.
  ARM: S5P: Decrease IO Registers memory region size on FIMC
  ARM: S5P: Fix DMA coherent mask for FIMC
parents 112d421d 4d89ecaa
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -18,10 +18,11 @@
#include <mach/map.h>
#include <mach/gpio-bank-c.h>
#include <mach/spi-clocks.h>
#include <mach/irqs.h>

#include <plat/s3c64xx-spi.h>
#include <plat/gpio-cfg.h>
#include <plat/irqs.h>
#include <plat/devs.h>

static char *spi_src_clks[] = {
	[S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
+52 −52
Original line number Diff line number Diff line
@@ -30,9 +30,9 @@
#include <plat/devs.h>
#include <plat/regs-serial.h>

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
	[0] = {
@@ -81,7 +81,7 @@ static struct resource real6410_dm9k_resource[] = {
	[2] = {
		.start	= S3C_EINT(7),
		.end	= S3C_EINT(7),
                .flags = IORESOURCE_IRQ,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
	}
};

+19 −1
Original line number Diff line number Diff line
@@ -280,6 +280,24 @@ static struct clk init_clocks_disable[] = {
		.parent		= &clk_hclk_dsys.clk,
		.enable		= s5pv210_clk_ip0_ctrl,
		.ctrlbit	= (1<<29),
	}, {
		.name		= "fimc",
		.id		= 0,
		.parent		= &clk_hclk_dsys.clk,
		.enable		= s5pv210_clk_ip0_ctrl,
		.ctrlbit	= (1 << 24),
	}, {
		.name		= "fimc",
		.id		= 1,
		.parent		= &clk_hclk_dsys.clk,
		.enable		= s5pv210_clk_ip0_ctrl,
		.ctrlbit	= (1 << 25),
	}, {
		.name		= "fimc",
		.id		= 2,
		.parent		= &clk_hclk_dsys.clk,
		.enable		= s5pv210_clk_ip0_ctrl,
		.ctrlbit	= (1 << 26),
	}, {
		.name		= "otg",
		.id		= -1,
@@ -357,7 +375,7 @@ static struct clk init_clocks_disable[] = {
		.id		= 1,
		.parent		= &clk_pclk_psys.clk,
		.enable		= s5pv210_clk_ip3_ctrl,
		.ctrlbit	= (1<<8),
		.ctrlbit	= (1 << 10),
	}, {
		.name		= "i2c",
		.id		= 2,
+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
	{
		.virtual	= (unsigned long)S5P_VA_SYSTIMER,
		.pfn		= __phys_to_pfn(S5PV210_PA_SYSTIMER),
		.length		= SZ_1M,
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)VA_VIC2,
+8 −1
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@
 */

#include <linux/kernel.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
@@ -18,7 +19,7 @@
static struct resource s5p_fimc0_resource[] = {
	[0] = {
		.start	= S5P_PA_FIMC0,
		.end	= S5P_PA_FIMC0 + SZ_1M - 1,
		.end	= S5P_PA_FIMC0 + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
@@ -28,9 +29,15 @@ static struct resource s5p_fimc0_resource[] = {
	},
};

static u64 s5p_fimc0_dma_mask = DMA_BIT_MASK(32);

struct platform_device s5p_device_fimc0 = {
	.name		= "s5p-fimc",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(s5p_fimc0_resource),
	.resource	= s5p_fimc0_resource,
	.dev		= {
		.dma_mask		= &s5p_fimc0_dma_mask,
		.coherent_dma_mask	= DMA_BIT_MASK(32),
	},
};
Loading