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Commit f1539f7a authored by abeykun's avatar abeykun Committed by Narendra Muppalla
Browse files

drm/msm/sde: add writeback ROI support for msmskunk 



For HW directly supporting writeback ROI x,y offsets
bypass writeback planes offset recalculation.

Change-Id: I8b38b6026482a4f72607ad74bbec2d3f741b94f8
Signed-off-by: default avatarabeykun <abeykun@codeaurora.org>
parent b85a5e3c

drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c

+20 −5
Original line number Diff line number Diff line
@@ -217,7 +217,18 @@ static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc, 
		SDE_ERROR("failed to get format %x\n", format->pixel_format);

		return;

	}

	wb_cfg->roi = *wb_roi;



	if (hw_wb->caps->features & BIT(SDE_WB_XY_ROI_OFFSET)) {

		ret = sde_format_populate_layout(mmu_id, fb, &wb_cfg->dest);

		if (ret) {

			SDE_DEBUG("failed to populate layout %d\n", ret);

			return;

		}

		wb_cfg->dest.width = fb->width;

		wb_cfg->dest.height = fb->height;

		wb_cfg->dest.num_planes = wb_cfg->dest.format->num_planes;

	} else {

		ret = sde_format_populate_layout_with_roi(mmu_id, fb, wb_roi,

			&wb_cfg->dest);

		if (ret) {
@@ -225,6 +236,7 @@ static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc, 
			SDE_DEBUG("failed to populate layout %d\n", ret);

			return;

		}

	}



	if ((wb_cfg->dest.format->fetch_planes == SDE_PLANE_PLANAR) &&

			(wb_cfg->dest.format->element[0] == C1_B_Cb))
@@ -241,6 +253,9 @@ static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc, 
			wb_cfg->dest.plane_pitch[2],

			wb_cfg->dest.plane_pitch[3]);



	if (hw_wb->ops.setup_roi)

		hw_wb->ops.setup_roi(hw_wb, wb_cfg);



	if (hw_wb->ops.setup_outformat)

		hw_wb->ops.setup_outformat(hw_wb, wb_cfg);

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+4 −1
Original line number Diff line number Diff line
@@ -175,9 +175,11 @@ enum { 
 * @SDE_WB_TRAFFIC_SHAPER,  Writeback traffic shaper bloc

 * @SDE_WB_UBWC_1_0,        Writeback Universal bandwidth compression 1.0

 *                          support

 * @SDE_WB_WBWC_1_5         UBWC 1.5 support

 * @SDE_WB_UBWC_1_5         UBWC 1.5 support

 * @SDE_WB_YUV_CONFIG       Writeback supports output of YUV colorspace

 * @SDE_WB_PIPE_ALPHA       Writeback supports pipe alpha

 * @SDE_WB_XY_ROI_OFFSET    Writeback supports x/y-offset of out ROI in

 *                          the destination image

 * @SDE_WB_MAX              maximum value

 */

enum {
@@ -192,6 +194,7 @@ enum { 
	SDE_WB_UBWC_1_0,

	SDE_WB_YUV_CONFIG,

	SDE_WB_PIPE_ALPHA,

	SDE_WB_XY_ROI_OFFSET,

	SDE_WB_MAX

};

drivers/gpu/drm/msm/sde/sde_hw_wb.c

+24 −1
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ 
#define WB_CSC_BASE			0x260

#define WB_DST_ADDR_SW_STATUS		0x2B0

#define WB_CDP_CTRL			0x2B4

#define WB_OUT_IMAGE_SIZE		0x2C0

#define WB_OUT_XY			0x2C4



static struct sde_wb_cfg *_wb_offset(enum sde_wb wb,

		struct sde_mdss_cfg *m,
@@ -119,6 +121,10 @@ static void sde_hw_wb_setup_format(struct sde_hw_wb *ctx, 
			(data->dest.plane_pitch[1] << 16);

	ystride1 = data->dest.plane_pitch[2] |

			(data->dest.plane_pitch[3] << 16);



	if (data->roi.h && data->roi.w)

		outsize = (data->roi.h << 16) | data->roi.w;

	else

		outsize = (data->dest.height << 16) | data->dest.width;



	if (SDE_FORMAT_IS_UBWC(fmt)) {
@@ -164,6 +170,20 @@ static void sde_hw_wb_traffic_shaper(struct sde_hw_wb *ctx, 
				&data->ts_cfg);

}



static void sde_hw_wb_roi(struct sde_hw_wb *ctx, struct sde_hw_wb_cfg *wb)

{

	struct sde_hw_blk_reg_map *c = &ctx->hw;

	u32 image_size, out_size, out_xy;



	image_size = (wb->dest.height << 16) | wb->dest.width;

	out_xy = (wb->roi.y << 16) | wb->roi.x;

	out_size = (wb->roi.h << 16) | wb->roi.w;



	SDE_REG_WRITE(c, WB_OUT_IMAGE_SIZE, image_size);

	SDE_REG_WRITE(c, WB_OUT_XY, out_xy);

	SDE_REG_WRITE(c, WB_OUT_SIZE, out_size);

}



static void _setup_wb_ops(struct sde_hw_wb_ops *ops,

	unsigned long features)

{
@@ -172,6 +192,9 @@ static void _setup_wb_ops(struct sde_hw_wb_ops *ops, 


	if (test_bit(SDE_WB_TRAFFIC_SHAPER, &features))

		ops->setup_trafficshaper = sde_hw_wb_traffic_shaper;



	if (test_bit(SDE_WB_XY_ROI_OFFSET, &features))

		ops->setup_roi = sde_hw_wb_roi;

}



struct sde_hw_wb *sde_hw_wb_init(enum sde_wb idx,

drivers/gpu/drm/msm/sde/sde_hw_wb.h

+4 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ struct sde_hw_wb_cfg { 
	struct sde_hw_fmt_layout dest;

	enum sde_intf_mode intf_mode;

	struct traffic_shaper_cfg ts_cfg;

	struct sde_rect roi;

	bool is_secure;

};
@@ -53,6 +54,9 @@ struct sde_hw_wb_ops { 


	void (*setup_trafficshaper)(struct sde_hw_wb *ctx,

		struct sde_hw_wb_cfg *wb);



	void (*setup_roi)(struct sde_hw_wb *ctx,

		struct sde_hw_wb_cfg *wb);

};



/**