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Commit f13c1426 authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "clk: mdss: write lane mode when powering on HDMI PHY" into msm-4.8

parents 4e7ea913 d78d27c0

drivers/clk/qcom/mdss/mdss-hdmi-pll-8996.c

+4 −0
Original line number Diff line number Diff line
@@ -763,6 +763,10 @@ static int hdmi_8996_phy_pll_set_clk_rate(struct clk *c, u32 tmds_clk) 
				     QSERDES_TX_L0_CLKBUF_ENABLE, 0x03);

	MDSS_PLL_REG_W(io->pll_base + HDMI_TX_L3_BASE_OFFSET,

				     QSERDES_TX_L0_CLKBUF_ENABLE, 0x03);

	MDSS_PLL_REG_W(io->pll_base + HDMI_TX_L0_BASE_OFFSET,

				     QSERDES_TX_L0_LANE_MODE, 0x03);

	MDSS_PLL_REG_W(io->pll_base + HDMI_TX_L2_BASE_OFFSET,

				     QSERDES_TX_L0_LANE_MODE, 0x03);



	MDSS_PLL_REG_W(io->pll_base + HDMI_TX_L0_BASE_OFFSET,

		     QSERDES_TX_L0_TX_BAND, cfg.tx_l0_tx_band);

drivers/clk/qcom/mdss/mdss-pll.c

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ static int mdss_pll_resource_parse(struct platform_device *pdev, 
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8992")) {

		pll_res->pll_interface_type = MDSS_HDMI_PLL_20NM;

	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8996")) {

		pll_res->pll_interface_type = MDSS_HDMI_PLL_14NM;

		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996;

	} else {

		goto err;

	}