Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 111 SUBLEVEL = 112 EXTRAVERSION = NAME = Roaring Lionus Loading arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; dmas = <&sdma 11 8 1>, <&sdma 12 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; Loading arch/s390/kernel/entry.S +2 −2 Original line number Diff line number Diff line Loading @@ -1187,7 +1187,7 @@ cleanup_critical: jl 0f clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end jl .Lcleanup_load_fpu_regs 0: BR_EX %r14 0: BR_EX %r14,%r11 .align 8 .Lcleanup_table: Loading Loading @@ -1217,7 +1217,7 @@ cleanup_critical: ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE lctlg %c1,%c1,__LC_USER_ASCE # load primary asce larl %r9,sie_exit # skip forward to sie_exit BR_EX %r14 BR_EX %r14,%r11 #endif .Lcleanup_system_call: Loading arch/x86/kernel/cpu/common.c +7 −0 Original line number Diff line number Diff line Loading @@ -848,6 +848,13 @@ void get_cpu_cap(struct cpuinfo_x86 *c) init_scattered_cpuid_features(c); init_speculation_control(c); /* * Clear/Set all flags overridden by options, after probe. * This needs to happen each time we re-probe, which may happen * several times during CPU initialization. */ apply_forced_caps(c); } static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) Loading arch/x86/kernel/kprobes/core.c +20 −22 Original line number Diff line number Diff line Loading @@ -414,25 +414,38 @@ void free_insn_page(void *page) module_memfree(page); } /* Prepare reljump right after instruction to boost */ static void prepare_boost(struct kprobe *p, int length) { if (can_boost(p->ainsn.insn, p->addr) && MAX_INSN_SIZE - length >= RELATIVEJUMP_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump(p->ainsn.insn + length, p->addr + length); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } static int arch_copy_kprobe(struct kprobe *p) { int ret; int len; set_memory_rw((unsigned long)p->ainsn.insn & PAGE_MASK, 1); /* Copy an instruction with recovering if other optprobe modifies it.*/ ret = __copy_instruction(p->ainsn.insn, p->addr); if (!ret) len = __copy_instruction(p->ainsn.insn, p->addr); if (!len) return -EINVAL; /* * __copy_instruction can modify the displacement of the instruction, * but it doesn't affect boostable check. */ if (can_boost(p->ainsn.insn, p->addr)) p->ainsn.boostable = 0; else p->ainsn.boostable = -1; prepare_boost(p, len); set_memory_ro((unsigned long)p->ainsn.insn & PAGE_MASK, 1); Loading Loading @@ -897,21 +910,6 @@ static void resume_execution(struct kprobe *p, struct pt_regs *regs, break; } if (p->ainsn.boostable == 0) { if ((regs->ip > copy_ip) && (regs->ip - copy_ip) + 5 < MAX_INSN_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump((void *)regs->ip, (void *)orig_ip + (regs->ip - copy_ip)); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } regs->ip += orig_ip - copy_ip; no_change: Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 111 SUBLEVEL = 112 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; dmas = <&sdma 11 8 1>, <&sdma 12 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; Loading
arch/s390/kernel/entry.S +2 −2 Original line number Diff line number Diff line Loading @@ -1187,7 +1187,7 @@ cleanup_critical: jl 0f clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end jl .Lcleanup_load_fpu_regs 0: BR_EX %r14 0: BR_EX %r14,%r11 .align 8 .Lcleanup_table: Loading Loading @@ -1217,7 +1217,7 @@ cleanup_critical: ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE lctlg %c1,%c1,__LC_USER_ASCE # load primary asce larl %r9,sie_exit # skip forward to sie_exit BR_EX %r14 BR_EX %r14,%r11 #endif .Lcleanup_system_call: Loading
arch/x86/kernel/cpu/common.c +7 −0 Original line number Diff line number Diff line Loading @@ -848,6 +848,13 @@ void get_cpu_cap(struct cpuinfo_x86 *c) init_scattered_cpuid_features(c); init_speculation_control(c); /* * Clear/Set all flags overridden by options, after probe. * This needs to happen each time we re-probe, which may happen * several times during CPU initialization. */ apply_forced_caps(c); } static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) Loading
arch/x86/kernel/kprobes/core.c +20 −22 Original line number Diff line number Diff line Loading @@ -414,25 +414,38 @@ void free_insn_page(void *page) module_memfree(page); } /* Prepare reljump right after instruction to boost */ static void prepare_boost(struct kprobe *p, int length) { if (can_boost(p->ainsn.insn, p->addr) && MAX_INSN_SIZE - length >= RELATIVEJUMP_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump(p->ainsn.insn + length, p->addr + length); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } static int arch_copy_kprobe(struct kprobe *p) { int ret; int len; set_memory_rw((unsigned long)p->ainsn.insn & PAGE_MASK, 1); /* Copy an instruction with recovering if other optprobe modifies it.*/ ret = __copy_instruction(p->ainsn.insn, p->addr); if (!ret) len = __copy_instruction(p->ainsn.insn, p->addr); if (!len) return -EINVAL; /* * __copy_instruction can modify the displacement of the instruction, * but it doesn't affect boostable check. */ if (can_boost(p->ainsn.insn, p->addr)) p->ainsn.boostable = 0; else p->ainsn.boostable = -1; prepare_boost(p, len); set_memory_ro((unsigned long)p->ainsn.insn & PAGE_MASK, 1); Loading Loading @@ -897,21 +910,6 @@ static void resume_execution(struct kprobe *p, struct pt_regs *regs, break; } if (p->ainsn.boostable == 0) { if ((regs->ip > copy_ip) && (regs->ip - copy_ip) + 5 < MAX_INSN_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump((void *)regs->ip, (void *)orig_ip + (regs->ip - copy_ip)); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } regs->ip += orig_ip - copy_ip; no_change: Loading