Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f050982a authored by Anton Blanchard's avatar Anton Blanchard Committed by Paul Mackerras
Browse files

[POWERPC] Add SPURR SPR to sysfs 



Now we have a SPURR cpu feature bit, we can export it to userspace in
sysfs.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 4c198557

arch/powerpc/kernel/sysfs.c

+8 −0
Original line number Diff line number Diff line
@@ -181,6 +181,7 @@ SYSFS_PMCSETUP(pmc6, SPRN_PMC6); 
SYSFS_PMCSETUP(pmc7, SPRN_PMC7);

SYSFS_PMCSETUP(pmc8, SPRN_PMC8);

SYSFS_PMCSETUP(purr, SPRN_PURR);

SYSFS_PMCSETUP(spurr, SPRN_SPURR);

SYSFS_PMCSETUP(dscr, SPRN_DSCR);



static SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0);
@@ -195,6 +196,7 @@ static SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6); 
static SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7);

static SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8);

static SYSDEV_ATTR(purr, 0600, show_purr, NULL);

static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);

static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);



static void register_cpu_online(unsigned int cpu)
@@ -234,6 +236,9 @@ static void register_cpu_online(unsigned int cpu) 
	if (cpu_has_feature(CPU_FTR_PURR))

		sysdev_create_file(s, &attr_purr);



	if (cpu_has_feature(CPU_FTR_SPURR))

		sysdev_create_file(s, &attr_spurr);



	if (cpu_has_feature(CPU_FTR_DSCR))

		sysdev_create_file(s, &attr_dscr);

}
@@ -278,6 +283,9 @@ static void unregister_cpu_online(unsigned int cpu) 
	if (cpu_has_feature(CPU_FTR_PURR))

		sysdev_remove_file(s, &attr_purr);



	if (cpu_has_feature(CPU_FTR_SPURR))

		sysdev_remove_file(s, &attr_spurr);



	if (cpu_has_feature(CPU_FTR_DSCR))

		sysdev_remove_file(s, &attr_dscr);

}

include/asm-powerpc/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ 
#define SPRN_TBRU	0x10D	/* Time Base Read Upper Register (user, R/O) */

#define SPRN_TBWL	0x11C	/* Time Base Lower Register (super, R/W) */

#define SPRN_TBWU	0x11D	/* Time Base Upper Register (super, R/W) */

#define SPRN_SPURR	0x134	/* Scaled PURR */

#define SPRN_HIOR	0x137	/* 970 Hypervisor interrupt offset */

#define SPRN_DBAT0L	0x219	/* Data BAT 0 Lower Register */

#define SPRN_DBAT0U	0x218	/* Data BAT 0 Upper Register */