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Commit ef976ec4 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon/dpm: update cac leakage table parsing for CI 



Uses a different table format if the board supports EVV.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9dd9333b

drivers/gpu/drm/radeon/r600_dpm.c

+13 −4
Original line number Diff line number Diff line
@@ -956,11 +956,20 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) 
				return -ENOMEM;

			}

			for (i = 0; i < cac_table->ucNumEntries; i++) {

				if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {

					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =

						le16_to_cpu(cac_table->entries[i].usVddc1);

					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =

						le16_to_cpu(cac_table->entries[i].usVddc2);

					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =

						le16_to_cpu(cac_table->entries[i].usVddc3);

				} else {

					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =

						le16_to_cpu(cac_table->entries[i].usVddc);

					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =

						le32_to_cpu(cac_table->entries[i].ulLeakageValue);

				}

			}

			rdev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;

		}

	}

drivers/gpu/drm/radeon/radeon.h

+11 −4
Original line number Diff line number Diff line
@@ -1256,14 +1256,21 @@ struct radeon_clock_voltage_dependency_table { 
	struct radeon_clock_voltage_dependency_entry *entries;

};



struct radeon_cac_leakage_entry {

union radeon_cac_leakage_entry {

	struct {

		u16 vddc;

		u32 leakage;

	};

	struct {

		u16 vddc1;

		u16 vddc2;

		u16 vddc3;

	};

};



struct radeon_cac_leakage_table {

	u32 count;

	struct radeon_cac_leakage_entry *entries;

	union radeon_cac_leakage_entry *entries;

};



struct radeon_phase_shedding_limits_entry {