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Commit ef557d76 authored by Andrzej Zaborowski's avatar Andrzej Zaborowski Committed by Tony Lindgren
Browse files

ARM: OMAP: correct misc 15xx and non-15xx platform code 



Disable accesses to SOFT_REQ_REG2 and ULPD_SOFT_DISABLE_REQ_REG
registers for 15xx processors that don't have these registers. Enable
level 2 interrupt handler for processors that identify as OMAP 15xx
(e.g 310) and not 1510 specifically. Also fix the following compiler
warning (only visible with CONFIG_OMAP_RESET_CLOCKS):

arch/arm/mach-omap1/clock.c: In function 'omap1_clk_disable_unused':
arch/arm/mach-omap1/clock.c:634: warning: 'return' with a value, in
function returning void

Signed-off-by: default avatarAndrzej Zaborowski <balrog@zabor.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 562aa1d4

arch/arm/mach-omap1/clock.c

+3 −2
Original line number Diff line number Diff line
@@ -496,7 +496,7 @@ static int omap1_clk_enable_generic(struct clk *clk) 
		}

	}



	return 0;

	return;

}



static void omap1_clk_disable_generic(struct clk *clk)
@@ -654,6 +654,7 @@ int __init omap1_clk_init(void) 
	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */

	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);

	omap_writew(reg, SOFT_REQ_REG);

	if (!cpu_is_omap15xx())

		omap_writew(0, SOFT_REQ_REG2);



	clk_init(&omap1_clk_functions);

arch/arm/mach-omap1/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -238,7 +238,7 @@ void __init omap_init_irq(void) 


	if (cpu_is_omap730())

		omap_unmask_irq(INT_730_IH2_IRQ);

	else if (cpu_is_omap1510())

	else if (cpu_is_omap15xx())

		omap_unmask_irq(INT_1510_IH2_IRQ);

	else if (cpu_is_omap16xx())

		omap_unmask_irq(INT_1610_IH2_IRQ);

arch/arm/mach-omap1/pm.c

+4 −2
Original line number Diff line number Diff line
@@ -256,6 +256,7 @@ void omap_pm_suspend(void) 
		tps65010_set_led(LED1, OFF);

	}



	if (!cpu_is_omap15xx())

		omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);



	/*
@@ -434,6 +435,7 @@ void omap_pm_suspend(void) 
		MPUI1610_RESTORE(OMAP_IH2_3_MIR);

	}



	if (!cpu_is_omap15xx())

		omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);



	/*